From: sashiko-bot@kernel.org
To: "Bartosz Golaszewski" <bartosz.golaszewski@oss.qualcomm.com>
Cc: linux-gpio@vger.kernel.org
Subject: Re: [PATCH] gpio: mvebu: fix sleeping-while-atomic in mvebu_gpio_level_irq_mask()
Date: Thu, 05 Nov 2026 12:54:22 +0000 [thread overview]
Message-ID: <sashiko-outbox-199076@kernel.org> (raw)
In-Reply-To: <20261105-gpio-mvebu-sleeping-while-atomic-v1-1-3ad7bb1c9e36@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] gpio: mvebu: missing use_raw_spinlock in mvebu_gpio_percpu_regmap_config
--
commit 7ad64e668b066c72ed4810dd8de43859b3810544
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
gpio: mvebu: fix sleeping-while-atomic in mvebu_gpio_level_irq_mask()
This commit sets use_raw_spinlock on mvebu_gpio_regmap_config to avoid
taking a sleepable spinlock_t on PREEMPT_RT kernels when accessing GPIO
registers while holding a raw_spinlock_t in the IRQ callbacks.
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index 267e6d5bacd0d..02d9ae5869d75 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -603,6 +603,7 @@ static const struct regmap_config mvebu_gpio_regmap_config = {
> .reg_bits = 32,
> .reg_stride = 4,
> .val_bits = 32,
> + .use_raw_spinlock = true,
> };
>
> static const struct regmap_config mvebu_gpio_percpu_regmap_config = {
[Severity: High]
Should mvebu_gpio_percpu_regmap_config also set .use_raw_spinlock = true?
In mvebu_gpio_probe_raw(), mvchip->percpu_regs is initialized with
mvebu_gpio_percpu_regmap_config:
mvchip->percpu_regs =
devm_regmap_init_mmio(&pdev->dev, base,
&mvebu_gpio_percpu_regmap_config);
When mvchip->soc_variant is MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
mvebu_gpioreg_level_mask(), mvebu_gpioreg_edge_mask(), and
mvebu_gpioreg_edge_cause() select mvchip->percpu_regs instead of
mvchip->regs:
case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
cpu = smp_processor_id();
*map = mvchip->percpu_regs;
*offset = GPIO_LEVEL_MASK_ARMADAXP_OFF(cpu);
break;
The irq_chip callbacks mvebu_gpio_level_irq_mask(),
mvebu_gpio_level_irq_unmask(), mvebu_gpio_edge_irq_mask(),
mvebu_gpio_edge_irq_unmask(), and mvebu_gpio_irq_ack() acquire the raw
spinlock gc->lock before calling mvebu_gpio_write_level_mask(),
mvebu_gpio_write_edge_mask(), or mvebu_gpio_write_edge_cause(), and
mvebu_gpio_irq_handler() reads these registers in hardirq context. Without
use_raw_spinlock on mvebu_gpio_percpu_regmap_config, won't Armada XP
systems still hit the same sleeping-while-atomic issue on PREEMPT_RT?
Also, the IRQ callbacks were converted to regmap in commit 2233bf7a92e7
("gpio: mvebu: convert to regmap") and mvebu_gpio_percpu_regmap_config was
split out in commit 4d305c227312 ("gpio: mvebu: name regmaps"), whereas
commit 48f32a835373 ("gpio: mvebu: switch pwm duration registers to
regmap") only moved mvebu_gpio_regmap_config earlier in the file. Should
the Fixes tag reference those commits instead?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261105-gpio-mvebu-sleeping-while-atomic-v1-1-3ad7bb1c9e36@oss.qualcomm.com?part=1
prev parent reply other threads:[~2026-11-05 12:54 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 12:46 [PATCH] gpio: mvebu: fix sleeping-while-atomic in mvebu_gpio_level_irq_mask() Bartosz Golaszewski
2026-11-05 12:54 ` sashiko-bot [this message]
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