From: sashiko-bot@kernel.org
To: "Cunyuan Liu" <cunyuan.liu@cixtech.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
robh@kernel.org, conor+dt@kernel.org, ojeda@kernel.org,
gary@garyguo.net
Subject: Re: [PATCH 1/3] dt-bindings: gpu: Add CIX Sky1 Mali support
Date: Fri, 06 Nov 2026 10:54:35 +0000 [thread overview]
Message-ID: <sashiko-outbox-201244@kernel.org> (raw)
In-Reply-To: <20261106104735.1651267-2-cunyuan.liu@cixtech.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] dt-bindings: gpu: arm,mali-valhall-csf: unwieldy per-compatible
conditionals
--
commit f3e7a046ab621a6ec3308f5290d9455780be0bec
Author: Cunyuan Liu <cunyuan.liu@cixtech.com>
dt-bindings: gpu: Add CIX Sky1 Mali support
This commit adds the CIX Sky1 Mali compatible string, resource constraints,
and a Device Tree example to the Arm Mali Valhall CSF GPU binding schema.
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> index 8eccd4338a2b2..a93acc6d91ec8 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> @@ -18,6 +18,7 @@ properties:
> oneOf:
> - items:
> - enum:
> + - cix,sky1-mali
> - mediatek,mt8196-mali
> - nxp,imx95-mali # G310
> - rockchip,rk3588-mali
> @@ -51,6 +52,9 @@ properties:
> - stacks
> - const: stacks
>
> + resets:
> + maxItems: 1
> +
> nvmem-cells:
> items:
> - description: bitmask of functional shader cores
> @@ -146,6 +150,34 @@ allOf:
> - nvmem-cells
> - nvmem-cell-names
> - power-domains
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: cix,sky1-mali
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: core
> + - const: stacks
> + power-domains:
> + maxItems: 1
> + power-domain-names: false
> + mali-supply: false
> + sram-supply: false
> + nvmem-cells: false
> + nvmem-cell-names: false
> + required:
> + - clock-names
> + - resets
> + - power-domains
> + else:
> + properties:
> + resets: false
[Severity: Low]
With each variant adding another per-compatible if-then-else block to
disable properties used only by other SoCs (and setting resets: false for
all other variants), the conditionals in arm,mali-valhall-csf.yaml are
becoming unwieldy. Should this binding be split into separate schema
documents rather than piling on more variant-specific conditionals here?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261106104735.1651267-1-cunyuan.liu@cixtech.com?part=1
next prev parent reply other threads:[~2026-11-06 10:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 10:47 [PATCH 0/3] Add initial GPU support for CIX Sky1 Cunyuan Liu
2026-11-06 10:47 ` [PATCH 1/3] dt-bindings: gpu: Add CIX Sky1 Mali support Cunyuan Liu
2026-11-06 10:54 ` sashiko-bot [this message]
2026-11-06 17:17 ` Conor Dooley
2026-11-06 10:47 ` [PATCH 2/3] drm/panthor: Add initial support for CIX Sky1 Cunyuan Liu
2026-11-06 10:58 ` sashiko-bot
2026-11-06 12:04 ` Philipp Zabel
2026-11-06 13:02 ` Cunyuan Liu (刘存原)
2026-11-06 13:02 ` Cunyuan Liu (刘存原)
2026-11-06 10:47 ` [PATCH 3/3] arm64: dts: cix: Add GPU support for Sky1 Orion O6 Cunyuan Liu
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