Re: [PATCH v6 1/4] drm/imagination: Limit access to the MIPS firmware interface

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] drm/imagination: wrong page count and loop bound in
  pvr_vm_get_pt_phys_addrs()
--

commit e62c2f99ef374e32a08f96715d23432d524c50fd
Author: Alessio Belle <alessio.belle@imgtec.com>

drm/imagination: Limit access to the MIPS firmware interface

This commit splits struct pvr_fw_mips_data into separate firmware and VM
structures, removes pvr_fw_mips.h, and adds pvr_vm_get_pt_phys_addrs() to
retrieve the MIPS firmware page table physical addresses.

> diff --git a/drivers/gpu/drm/imagination/pvr_vm_mips.c b/drivers/gpu/drm/imagination/pvr_vm_mips.c
> index 5847a1c92bea8..264ea0fccf9c1 100644
> --- a/drivers/gpu/drm/imagination/pvr_vm_mips.c
> +++ b/drivers/gpu/drm/imagination/pvr_vm_mips.c
> @@ -16,6 +17,31 @@
>  #include <linux/types.h>
>  #include <linux/vmalloc.h>
>  
> +#define PVR_MIPS_PT_PAGE_COUNT \
> +	DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)
> +
> +/**
> + * struct pvr_vm_mips_data - MIPS-VM-specific data
> + */
> +struct pvr_vm_mips_data {
> +	/**
> +	 * @pt_pages: Pages containing MIPS pagetable.
> +	 */
> +	struct page *pt_pages[PVR_MIPS_PT_PAGE_COUNT];
> +
> +	/** @pt: Pointer to CPU mapping of MIPS pagetable. */
> +	u32 *pt;
> +
> +	/** @pt_dma_addr: DMA mappings of MIPS pagetable. */
> +	dma_addr_t pt_dma_addr[PVR_MIPS_PT_PAGE_COUNT];

[ ... ]

> @@ -230,8 +256,38 @@ pvr_vm_mips_unmap(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj)
>  			    ROGUE_MIPSFW_LOG2_PAGE_SIZE_4K;
>  
>  	for (u32 pfn = start_pfn; pfn < end_pfn; pfn++)
> -		WRITE_ONCE(mips_data->pt[pfn], 0);
> +		WRITE_ONCE(vm_data->pt[pfn], 0);
>  
>  	pvr_mmu_flush_request_all(pvr_dev);
>  	WARN_ON(pvr_mmu_flush_exec(pvr_dev, true));
>  }
> +
> +/**
> + * pvr_vm_get_pt_phys_addrs() - Acquire the physical addresses of the MIPS FW page table pages
> + * @pvr_dev: Target PowerVR device.
> + * @phys_addrs: Output array for physical addresses of MIPS FW page table pages.
> + * @max_num_addrs: Maximum number of addresses that can be written to @phys_addrs.
> + *
> + * Returns:
> + *  * 0 on success, or
> + *  * -%EINVAL if @phys_addrs cannot accommodate all MIPS FW page table pages.
> + */
> +int
> +pvr_vm_get_pt_phys_addrs(struct pvr_device *pvr_dev, u64 *phys_addrs, int max_num_addrs)
> +{
> +	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;
> +	struct pvr_vm_mips_data *vm_data = fw_dev->processor_data.mips_data.vm_data;
> +
> +	if (ARRAY_SIZE(vm_data->pt_pages) > max_num_addrs)
> +		return -EINVAL;
> +
> +	for (u32 page_nr = 0; page_nr < max_num_addrs; page_nr++) {
> +		/* Firmware expects 4k pages, but host page size might be different. */
> +		u32 src_page_nr = (page_nr * ROGUE_MIPSFW_PAGE_SIZE_4K) >> PAGE_SHIFT;
> +		u32 page_offset = (page_nr * ROGUE_MIPSFW_PAGE_SIZE_4K) & ~PAGE_MASK;
> +
> +		phys_addrs[page_nr] = vm_data->pt_dma_addr[src_page_nr] + page_offset;
> +	}
> +
> +	return 0;
> +}

[Severity: Medium]
Should pvr_vm_get_pt_phys_addrs() check and loop against
ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES rather than
ARRAY_SIZE(vm_data->pt_pages) and max_num_addrs?

vm_data->pt_pages and vm_data->pt_dma_addr are sized to
PVR_MIPS_PT_PAGE_COUNT, which is the number of host PAGE_SIZE pages (1 on
16K or 64K page kernels), whereas the loop steps by 4K firmware pages
(ROGUE_MIPSFW_PAGE_SIZE_4K).  On 16K or 64K page hosts, checking
ARRAY_SIZE(vm_data->pt_pages) > max_num_addrs allows a phys_addrs buffer
with fewer than 4 entries, and looping up to max_num_addrs reads out of
bounds from vm_data->pt_dma_addr[] whenever a caller passes max_num_addrs >
ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES.

Also, max_num_addrs is a signed int compared against unsigned ARRAY_SIZE()
and u32 page_nr, which triggers -Wsign-compare warnings and promotes
negative values to large unsigned integers.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109-b4-simplify-mips-pte-defs-v6-0-65153bc9a71c@imgtec.com?part=1