Re: [PATCH] drm/msm: align kernel-managed GPU VAs to 64 KiB

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] drm/msm: sub-64K hole scan and VA fragmentation in
  msm_gem_vma_new()
--

commit dbbe11968537b24a2b140215f7ad31d5a022afb3
Author: Gaurav Suman <gauravsuman007@gmail.com>

drm/msm: align kernel-managed GPU VAs to 64 KiB

This commit aligns virtual address allocations in kernel-managed GPU VMs to
64 KiB in msm_gem_vma_new(), falling back to PAGE_SIZE alignment on -ENOSPC.

> diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c
> index f687a629629d3..2af4329128994 100644
> --- a/drivers/gpu/drm/msm/msm_gem_vma.c
> +++ b/drivers/gpu/drm/msm/msm_gem_vma.c
> @@ -388,9 +388,20 @@ msm_gem_vma_new(struct drm_gpuvm *gpuvm, struct drm_gem_object *obj,
>  	if (vm->managed) {
>  		BUG_ON(offset != 0);
>  		BUG_ON(!obj);  /* NULL mappings not valid for kernel managed VM */
> +		/*
> +		 * On a6xx (seen on A640) the CCU can read the 64 KiB-aligned
> +		 * start of the block that holds a bound render target. Align
> +		 * kernel-managed VAs to 64 KiB so that block start lies inside
> +		 * the buffer itself; callers with a tight fixed window, such as
> +		 * the GMU, fall back to page alignment.
> +		 */
>  		ret = drm_mm_insert_node_in_range(&vm->mm, &vma->node,
> -						obj->size, PAGE_SIZE, 0,
> +						obj->size, SZ_64K, 0,
>  						range_start, range_end, 0);
> +		if (ret == -ENOSPC)
> +			ret = drm_mm_insert_node_in_range(&vm->mm, &vma->node,
> +							  obj->size, PAGE_SIZE, 0,
> +							  range_start, range_end, 0);

[Severity: Medium]
Does aligning vma->node to SZ_64K while keeping obj->size page-aligned
degrade small BO allocations in vm->mm to an O(N) hole scan and fragment
small kernel-managed VMs?

When obj->size is not a multiple of 64 KiB (such as a 4 KiB BO), rounding
the next allocation up to a 64 KiB boundary in drm_mm_insert_node_in_range()
leaves an unaligned gap of up to 60 KiB in vm->mm.holes_size that contains
no 64 KiB-aligned address.  Because mode 0 (DRM_MM_INSERT_BEST) starts at
the smallest hole >= obj->size and steps through vm->mm.holes_size in
non-decreasing size order, every subsequent SZ_64K-aligned allocation of a
small BO walks past all accumulated sub-64 KiB holes before reaching a
usable hole.

This also applies to all kernel-managed VMs rather than just a6xx: in
a2xx_create_vm(), the GPU VM is only 0xfff * SZ_64K (~256 MiB), so 4095
4 KiB BOs fragment the entire address space into 60 KiB holes and cause any
subsequent allocation of size >= 64 KiB to fail with -ENOSPC even with the
PAGE_SIZE fallback.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109-msm-va-align-v1-1-2e9b576d2e4e@gmail.com?part=1