Re: [PATCH v5] PCI: Ensure ATS disabled via quirk before notifying IOMMU drivers

[sashiko-bot@kernel.org]

> Apply the quirks that disable ATS before IOMMU drivers are notified
> about the device. Convert the quirks from final to header fixups and
> have them set a new no_ats bit in struct pci_dev, which keeps
> pci_ats_init() from setting pci_dev.ats_cap.
> 
> Header fixups run in pci_device_add() before pci_init_capabilities()
> initializes ATS and before device_add() notifies IOMMU drivers. Final
> fixups run later, in pci_bus_add_device(). Use header fixups instead of
> early fixups because quirk_amd_harvest_no_ats() needs subsystem_vendor
> and subsystem_device, which are not yet set during early fixups.
> 
> This ensures that pci_ats_supported() returns the same value in
> iommu_ops.probe_device() and iommu_ops.release_device(). Since commit
> 89436f4f5412 ("iommu/vt-d: Fix WARN_ON in iommu probe path"), the Intel
> IOMMU driver relies on this to decide whether to add a device to, and
> remove it from, iommu->device_rbtree. With final fixups,
> pci_ats_supported() returns true at probe but false at release, so the
> device is never removed from the rbtree, leading to a later
> use-after-free.
> 
> This only affects PCI devices added after IOMMU bus notifiers are set
> up, e.g. hot-plugged devices and VFs.
> 
> Fixes: a18615b1cfc0 ("PCI: Disable ATS for specific Intel IPU E2000 devices")
> Fixes: 9b44b0b09dec ("PCI: Mark AMD Stoney GPU ATS as broken")
> Fixes: 3f1271b54edc ("PCI: Mark all AMD Navi10 and Navi14 GPU ATS as broken")
> Closes: https://lore.kernel.org/linux-iommu/aYUQ_HkDJU9kjsUl@google.com/
> Signed-off-by: David Matlack <dmatlack@google.com>

Sashiko has reviewed this patch and found no issues.

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