From: sashiko-bot@kernel.org
To: "Gabriel Fernandez" <gabriel.fernandez@foss.st.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 2/5] dt-bindings: arm: stm32: Add clock-controller sub-node to STM32MP2 SYSCFG
Date: Tue, 10 Nov 2026 13:17:26 +0000 [thread overview]
Message-ID: <sashiko-outbox-207108@kernel.org> (raw)
In-Reply-To: <20261110-ups_mp25_clk_syscfg-v2-2-624559bb8ec7@foss.st.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] dt-bindings: arm: stm32: split STM32MP23/25 SYSCFG into separate
schema
--
commit a6e3f1e2b7c45d1069bba34abc7927e0b05e5a42
Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
dt-bindings: arm: stm32: Add clock-controller sub-node to STM32MP2 SYSCFG
This commit adds a required clock-controller sub-node to the STM32MP23x and
STM32MP25x SYSCFG bindings and deprecates the top-level #clock-cells
property.
> diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
> index a559f8b03b842..13c02844a91f9 100644
> --- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
> +++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
> @@ -38,6 +38,10 @@ properties:
>
> "#clock-cells":
> const: 0
> + deprecated: true
> + description:
> + The LTDC pixel clock multiplexer is described by the clock-controller
> + sub-node.
>
> "#address-cells":
> const: 1
> @@ -45,6 +49,10 @@ properties:
> "#size-cells":
> const: 1
>
> + clock-controller:
> + type: object
> + $ref: /schemas/clock/st,stm32mp25-syscfg-clk.yaml#
> +
> patternProperties:
> "^phy@2[48]00$":
> type: object
> @@ -78,8 +86,8 @@ allOf:
> then:
> required:
> - "#address-cells"
> - - "#clock-cells"
> - "#size-cells"
> + - clock-controller
> - phy@2400
> - phy@2800
> else:
> @@ -87,6 +95,7 @@ allOf:
> '#address-cells': false
> '#clock-cells': false
> '#size-cells': false
> + clock-controller: false
> phy@2400: false
> phy@2800: false
[Severity: Low]
This isn't a bug, but should st,stm32mp23-syscfg and st,stm32mp25-syscfg be
split into a separate schema document instead of adding more conditionals
to st,stm32-syscon.yaml?
Unlike the simple syscon nodes in this binding, the STM32MP23/25 variants
forbid the top-level clocks property and require a distinct set of child
nodes and cell properties (#address-cells, #size-cells, clock-controller,
phy@2400, and phy@2800) that have to be explicitly disallowed for every
other compatible in the file.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-ups_mp25_clk_syscfg-v2-0-624559bb8ec7@foss.st.com?part=2
next prev parent reply other threads:[~2026-11-10 13:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 13:10 [PATCH v2 0/5] clk: stm32: Add the STM32MP2 SYSCFG LTDC pixel clock mux Gabriel Fernandez
2026-11-10 13:10 ` [PATCH v2 1/5] dt-bindings: clock: Add STM32MP25 SYSCFG clock controller Gabriel Fernandez
2026-11-10 13:10 ` [PATCH v2 2/5] dt-bindings: arm: stm32: Add clock-controller sub-node to STM32MP2 SYSCFG Gabriel Fernandez
2026-11-10 13:17 ` sashiko-bot [this message]
2026-11-10 13:10 ` [PATCH v2 3/5] clk: stm32: Add STM32MP25 SYSCFG clock driver Gabriel Fernandez
2026-11-12 0:44 ` Brian Masney
2026-11-10 13:10 ` [PATCH v2 4/5] arm64: dts: st: add LTDC pixel clock controller on stm32mp23 Gabriel Fernandez
2026-11-10 13:10 ` [PATCH v2 5/5] arm64: dts: st: add LTDC pixel clock controller on stm32mp25 Gabriel Fernandez
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