Re: [PATCH v6 3/6] riscv: accept the atomic extensions this kernel was built with

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] riscv: hwprobe_one_pair() falsely reports IMA base on
  zalrsc-only harts
--

commit 28e749f3a8a1535f66a4515b72ef2377c9c49282
Author: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>

riscv: accept the atomic extensions this kernel was built with

This commit updates riscv_early_of_processor_hartid() to accept harts
whose riscv,isa-extensions property lists "zalrsc" (and "zaamo" when
CONFIG_RISCV_ISA_ZAAMO is enabled) instead of "a".

> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 3dbc8cc557dd1..9ba0d49c87bc3 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -82,12 +82,29 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo
>  		return -ENODEV;
>  
>  	if (of_property_match_string(node, "riscv,isa-extensions", "i") < 0 ||
> -	    of_property_match_string(node, "riscv,isa-extensions", "m") < 0 ||
> -	    of_property_match_string(node, "riscv,isa-extensions", "a") < 0) {
> -		pr_warn("CPU with hartid=%lu does not support ima", *hart);
> +	    of_property_match_string(node, "riscv,isa-extensions", "m") < 0) {
> +		pr_warn("CPU with hartid=%lu does not support im", *hart);
>  		return -ENODEV;
>  	}
>  
> +	/*
> +	 * Require the atomic extensions this kernel was built with. "a"
> +	 * covers both; otherwise LR/SC is always needed and AMO is needed
> +	 * when the kernel uses it.
> +	 */
> +	if (of_property_match_string(node, "riscv,isa-extensions", "a") < 0) {
> +		if (of_property_match_string(node, "riscv,isa-extensions", "zalrsc") < 0) {
> +			pr_warn("CPU with hartid=%lu does not support zalrsc", *hart);
> +			return -ENODEV;
> +		}
> +
> +		if (IS_ENABLED(CONFIG_RISCV_ISA_ZAAMO) &&
> +		    of_property_match_string(node, "riscv,isa-extensions", "zaamo") < 0) {
> +			pr_warn("CPU with hartid=%lu does not support zaamo", *hart);
> +			return -ENODEV;
> +		}
> +	}

[Severity: Medium]
As reported by Conor Dooley on v4 [1], when CONFIG_RISCV_ISA_ZAAMO is
disabled and a hart boots with only "zalrsc" (without "a" or "zaamo"),
does hwprobe_one_pair() still report RISCV_HWPROBE_BASE_BEHAVIOR_IMA for
RISCV_HWPROBE_KEY_BASE_BEHAVIOR?

arch/riscv/kernel/sys_hwprobe.c:hwprobe_one_pair() {
    ...
	case RISCV_HWPROBE_KEY_BASE_BEHAVIOR:
		pair->value = RISCV_HWPROBE_BASE_BEHAVIOR_IMA;
		break;
    ...
}

RISCV_HWPROBE_BASE_BEHAVIOR_IMA advertises full rv32ima or rv64ima
support, including Zaamo AMO instructions, so userspace querying hwprobe
on a zalrsc-only hart will be told that AMO instructions are supported and
can fault with SIGILL when executing them.

[1] https://lore.kernel.org/r/20261103-pushcart-very-04a34d0ffb0e@spud

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-lrsc-only-v6-0-bafc3cc0fcae@mobileye.com?part=3