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From: sashiko-bot@kernel.org
To: "Arun Iyengar" <aiyengar1990@gmail.com>
Cc: devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev,
	robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 8/8] arm64: dts: allwinner: orangepi-zero2: Add i2c aliases
Date: Wed, 11 Nov 2026 06:11:43 +0000	[thread overview]
Message-ID: <sashiko-outbox-208395@kernel.org> (raw)
In-Reply-To: <20261111-h616-zero2-dt-v2-8-88d8030fc975@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] arm64: dts: allwinner: aliases for disabled and unusable I2C
  buses
--

commit ba431251208e1b9ebd8e19b71da4c12196e7c374
Author: Arun Iyengar <aiyengar1990@gmail.com>

arm64: dts: allwinner: orangepi-zero2: Add i2c aliases

This commit adds i2c0 through i2c5 aliases for the SoC TWI controllers in
the Orange Pi Zero2 board device tree.

> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> index d5d39bac59155..98fc83291dc83 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> @@ -12,6 +12,15 @@
>  / {
>  	model = "OrangePi Zero2";
>  	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
> +
> +	aliases {
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &r_i2c;
> +	};
>  };

[Severity: Low]
As reported by Jernej Škrabec on v1 [1], should these i2c aliases live in
overlays rather than the base board DT, especially since all six
controllers are disabled here and three of them conflict with enabled
on-board peripherals?

In particular, r_i2c (i2c5) only routes to PL0 and PL1, which this board
already uses for r_rsb to talk to the AXP305 PMIC.  Likewise, the external
pin options for i2c0 (PI5/PI6) and i2c1 (PH0/PH1 or PI7/PI8) conflict with
the enabled emac0 (ext_rgmii_pins) and uart0 (uart0_ph_pins) nodes in
sun50i-h616-orangepi-zero.dtsi.

[1] https://lore.kernel.org/r/ekjxzCRpRcWPwcDw_lDV4g@gmail.com

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261111-h616-zero2-dt-v2-0-88d8030fc975@gmail.com?part=8

      reply	other threads:[~2026-11-11  6:11 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-11  6:00 [PATCH v2 0/8] arm64: dts: allwinner: h616: Orange Pi Zero2 fixes, GPU DVFS and GPU cooling Arun Iyengar via B4 Relay
2026-11-11  6:00 ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 1/8] arm64: dts: allwinner: h616: Cover the codec RAMP register Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 2/8] arm64: dts: allwinner: orangepi-zero2: Let the PHY add the RX delay Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 3/8] arm64: dts: allwinner: h616: Add GPU OPP table Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 4/8] arm64: dts: allwinner: h616: Throttle the GPU from the GPU thermal zone Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 5/8] arm64: dts: allwinner: orangepi-zero2: Keep VDD-SYS at or above 900 mV Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 6/8] arm64: dts: allwinner: orangepi-zero2: Enable GPU DVFS Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 7/8] arm64: dts: allwinner: orangepi-zero2: Describe the SPI NOR supply Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:00 ` [PATCH v2 8/8] arm64: dts: allwinner: orangepi-zero2: Add i2c aliases Arun Iyengar via B4 Relay
2026-11-11  6:00   ` Arun Iyengar
2026-11-11  6:11   ` sashiko-bot [this message]

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