All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Xincheng Ji" <jixincheng@ultrarisc.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v8 3/8] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles
Date: Thu, 12 Nov 2026 02:10:18 +0000	[thread overview]
Message-ID: <sashiko-outbox-210157@kernel.org> (raw)
In-Reply-To: <20261112-ultrarisc-dts-v8-3-14fa0834cac4@ultrarisc.com>

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] dt-bindings: riscv: ultrarisc lists departed maintainer and
  stale git tree
--

commit 12ea55f6c9205d92a219a92f47c317d3c2daaad7
Author: Jia Wang <wangjia@ultrarisc.com>

dt-bindings: riscv: Add UltraRISC DP1000 board compatibles

This commit adds the device tree binding schema and MAINTAINERS entry for
UltraRISC DP1000 SoC-based boards (Shenzhen Rongda M0 and Milk-V Titan).

> diff --git a/Documentation/devicetree/bindings/riscv/ultrarisc.yaml b/Documentation/devicetree/bindings/riscv/ultrarisc.yaml
> new file mode 100644
> index 0000000000000..a51e63dbeca33
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/riscv/ultrarisc.yaml
> @@ -0,0 +1,27 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/riscv/ultrarisc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: UltraRISC SoC-based boards
> +
> +maintainers:
> +  - Jia Wang <wangjia@ultrarisc.com>

[ ... ]

> diff --git a/MAINTAINERS b/MAINTAINERS
> index ff1c1aea9a989..7eb1b2971bead 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -23639,6 +23639,13 @@ F:	include/dt-bindings/power/thead,th1520-power.h
>  F:	include/dt-bindings/reset/thead,th1520-reset.h
>  F:	include/linux/firmware/thead/thead,th1520-aon.h
>  
> +RISC-V ULTRARISC SoC SUPPORT
> +M:	Jia Wang <wangjia@ultrarisc.com>
> +L:	linux-riscv@lists.infradead.org
> +S:	Supported
> +T:	git https://github.com/ultrarisc/linux.git
> +F:	Documentation/devicetree/bindings/riscv/ultrarisc.yaml

[Severity: Low]
As reported by Conor Dooley on v7 [1], should both the new binding schema and
the MAINTAINERS entry list Xincheng Ji as maintainer and
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ as the git
tree instead of Jia Wang and the github.com/ultrarisc/linux.git tree?

Later in the series, commit "MAINTAINERS: Update UltraRISC platform
maintainer and tree" overwrites the MAINTAINERS entry added here, while
Documentation/devicetree/bindings/riscv/ultrarisc.yaml is left listing Jia
Wang, who has left UltraRISC.

[1] https://lore.kernel.org/r/20261110-amused-strobe-d6cf2bf24861@spud

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-ultrarisc-dts-v8-0-14fa0834cac4@ultrarisc.com?part=3

  reply	other threads:[~2026-11-12  2:10 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-12  2:00 [PATCH v8 0/8] riscv: Add device tree support for UltraRISC DP1000 Xincheng Ji via B4 Relay
2026-11-12  2:00 ` Xincheng Ji via B4 Relay
2026-11-12  2:00 ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 1/8] dt-bindings: vendor-prefixes: Add shenrongda Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 2/8] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 3/8] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:10   ` sashiko-bot [this message]
2026-11-12  2:01 ` [PATCH v8 4/8] dt-bindings: timer: Add UltraRISC DP1000 CLINT Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 5/8] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 6/8] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 7/8] riscv: dts: ultrarisc: Add Milk-V Titan " Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12  2:01 ` [PATCH v8 8/8] MAINTAINERS: Update UltraRISC platform maintainer and tree Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji via B4 Relay
2026-11-12  2:01   ` Xincheng Ji
2026-11-12 18:01 ` [PATCH v8 0/8] riscv: Add device tree support for UltraRISC DP1000 Conor Dooley
2026-11-12 18:01   ` Conor Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=sashiko-outbox-210157@kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jixincheng@ultrarisc.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.