From: sashiko-bot@kernel.org
To: "Bartosz Golaszewski" <bartosz.golaszewski@oss.qualcomm.com>,
"Thara Gopinath" <thara.gopinath@gmail.com>,
"Herbert Xu" <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
"Stanimir Varbanov" <svarbanov@mm-sol.com>,
"Eneas U de Queiroz" <cotequeiroz@gmail.com>,
"Kuldeep Singh" <kuldeep.singh@oss.qualcomm.com>,
"Eric Biggers" <ebiggers@kernel.org>,
"Demi Marie Obenour" <demiobenour@gmail.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
"Russell King" <linux@armlinux.org.uk>,
"Abel Vesa" <abelvesa@kernel.org>
Cc: linux-crypto@vger.kernel.org, brgl@kernel.org,
"Pankaj Patil" <pankaj.patil@oss.qualcomm.com>
Subject: Re: [PATCH v11 1/4] crypto: qce - convert to auxiliary bus
Date: Thu, 12 Nov 2026 14:34:41 +0000 [thread overview]
Message-ID: <sashiko-outbox-211343@kernel.org> (raw)
In-Reply-To: <20261112-qce-fix-self-tests-v11-1-b86a65ee7107@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Low] crypto: qce: ignored .driver.name initializer in
qce_crypto_driver
- [Low] crypto: qce - stale ICC comment in qce_crypto_probe()
--
commit 29e94f7689b20cef79914c127c10bb58d32472f1
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
crypto: qce - convert to auxiliary bus
This commit converts the Qualcomm crypto engine driver from a platform
driver to an auxiliary bus driver, removes interconnect bandwidth scaling,
updates runtime PM handling, and uses the parent device for DMA mappings.
> diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
> index ddb4df3d227f8..346e9ea0fe0f0 100644
> --- a/drivers/crypto/qce/core.c
> +++ b/drivers/crypto/qce/core.c
[ ... ]
> @@ -228,10 +243,6 @@ static int qce_crypto_probe(struct platform_device *pdev)
> if (IS_ERR(qce->bus))
> return PTR_ERR(qce->bus);
>
> - qce->mem_path = devm_of_icc_get(dev, "memory");
> - if (IS_ERR(qce->mem_path))
> - return PTR_ERR(qce->mem_path);
> -
> /*
> * Enable runtime PM after clocks and ICC path are acquired so that
> * the resume callback can enable clocks and apply the ICC bandwidth
[Severity: Low]
This isn't a bug, but this comment in qce_crypto_probe() still mentions
acquiring the ICC path and applying the ICC bandwidth vote, which this
commit removes from the driver.
[ ... ]
> @@ -336,25 +330,22 @@ static const struct dev_pm_ops qce_crypto_pm_ops = {
> SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> };
>
> -static const struct of_device_id qce_crypto_of_match[] = {
> - { .compatible = "qcom,crypto-v5.1", },
> - { .compatible = "qcom,crypto-v5.4", },
> - { .compatible = "qcom,qce", },
> +static const struct auxiliary_device_id qce_crypto_ids[] = {
> + { .name = "qce.crypto", },
> {}
> };
> -MODULE_DEVICE_TABLE(of, qce_crypto_of_match);
> +MODULE_DEVICE_TABLE(auxiliary, qce_crypto_ids);
>
> -static struct platform_driver qce_crypto_driver = {
> +static struct auxiliary_driver qce_crypto_driver = {
> .probe = qce_crypto_probe,
> + .id_table = qce_crypto_ids,
> .driver = {
> - .name = KBUILD_MODNAME,
> - .of_match_table = qce_crypto_of_match,
> + .name = "qce-crypto",
> .pm = pm_ptr(&qce_crypto_pm_ops),
> },
> };
[Severity: Low]
Should qce_crypto_driver set .name instead of .driver.name, or drop
.driver.name? __auxiliary_driver_register() unconditionally overwrites
auxdrv->driver.name based on auxdrv->name and the module name:
drivers/base/auxiliary.c:__auxiliary_driver_register() {
...
if (auxdrv->name)
auxdrv->driver.name = kasprintf(GFP_KERNEL, "%s.%s", modname,
auxdrv->name);
else
auxdrv->driver.name = kasprintf(GFP_KERNEL, "%s", modname);
...
}
Because qce_crypto_driver.name is NULL, the "qce-crypto" initializer is
ignored and overwritten with KBUILD_MODNAME ("qcrypto").
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-qce-fix-self-tests-v11-0-b86a65ee7107@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-11-12 14:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 14:10 [PATCH v11 0/4] crypto: qce - Split the crypto driver into core and crypto parts Bartosz Golaszewski
2026-11-12 14:10 ` [PATCH v11 1/4] crypto: qce - convert to auxiliary bus Bartosz Golaszewski
2026-11-12 14:34 ` sashiko-bot [this message]
2026-11-12 14:10 ` [PATCH v11 2/4] soc: qcom: add core driver for the Qualcomm Crypto Engine Bartosz Golaszewski
2026-11-12 14:21 ` sashiko-bot
2026-11-12 14:10 ` [PATCH v11 3/4] arm64: defconfig: update the Qualcomm Crypto Engine entry Bartosz Golaszewski
2026-11-12 14:10 ` [PATCH v11 4/4] arm: multi_v7_defconfig: " Bartosz Golaszewski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=sashiko-outbox-211343@kernel.org \
--to=sashiko-bot@kernel.org \
--cc=abelvesa@kernel.org \
--cc=andersson@kernel.org \
--cc=bartosz.golaszewski@oss.qualcomm.com \
--cc=brgl@kernel.org \
--cc=cotequeiroz@gmail.com \
--cc=davem@davemloft.net \
--cc=demiobenour@gmail.com \
--cc=ebiggers@kernel.org \
--cc=herbert@gondor.apana.org.au \
--cc=konradybcio@kernel.org \
--cc=kuldeep.singh@oss.qualcomm.com \
--cc=linux-crypto@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=pankaj.patil@oss.qualcomm.com \
--cc=sashiko-reviews@lists.linux.dev \
--cc=svarbanov@mm-sol.com \
--cc=thara.gopinath@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.