Re: [PATCH v1 07/10] dt-bindings: display: tegra: Document Tegra114 CSI

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] dt-bindings: display: tegra: broken clock-names and clocks
  bounds for Tegra30
- [Low] dt-bindings: display: tegra: unwieldy conditionals for Tegra114
  CSI variant
--

commit bc3414960c2f3dc8bae0883c0237f89de055bb7d
Author: Svyatoslav Ryhel <clamor95@gmail.com>

dt-bindings: display: tegra: Document Tegra114 CSI

This commit adds the nvidia,tegra114-csi compatible string and its clock and
calibration constraints to the Tegra20 CSI binding schema.

> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> index a1aea9590769f..0c18ac81c6d6f 100644
> --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> @@ -14,6 +14,7 @@ properties:
>      enum:
>        - nvidia,tegra20-csi
>        - nvidia,tegra30-csi
> +      - nvidia,tegra114-csi
>  
>    reg:
>      maxItems: 1
> @@ -24,12 +25,18 @@ properties:
>        - description: module clock
>        - description: PAD A clock
>        - description: PAD B clock
> +      - description: A/B lanes clock
> +      - description: C/D lanes clock
> +      - description: E lane clock
>  
>    clock-names:
>      items:
>        - const: csi
>        - const: csia-pad
>        - const: csib-pad
> +      - const: cilab
> +      - const: cilcd
> +      - const: cile

[Severity: Medium]
Does extending the top-level clock-names items list to 6 entries without
setting minItems: 3 cause dtbs_check to fail on Tegra30 device trees?

Without an explicit minItems at the top level, dtschema defaults clock-names
to minItems: 6, which cannot be relaxed by the minItems: 3 rule in the
nvidia,tegra30-csi allOf branch and causes csi@800 in
arch/arm/boot/dts/nvidia/tegra30.dtsi to fail validation.  In addition,
expanding the top-level clocks and clock-names lists to 6 items leaves
nvidia,tegra30-csi without an upper bound unless maxItems: 3 is added to its
conditional block.

> @@ -125,6 +132,22 @@ allOf:
>          clock-names:
>            minItems: 3
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - nvidia,tegra114-csi
> +    then:
> +      properties:
> +        "#nvidia,mipi-calibrate-cells": false
> +
> +        clocks:
> +          minItems: 6
> +
> +        clock-names:
> +          minItems: 6
> +
>  additionalProperties: false
>  
>  required:

[Severity: Low]
Would nvidia,tegra114-csi fit better in a separate binding schema document?

With this addition, every compatible string in nvidia,tegra20-csi.yaml needs
its own if/then block to override clocks, clock-names, and
#nvidia,mipi-calibrate-cells.  Tegra114 CSI also differs in its hardware
layout: it adds CIL C/D and E lane clocks for a third port while the shared
schema restricts patternProperties to ^channel@[0-1]$, and
include/dt-bindings/clock/tegra114-car.h does not define the csia-pad or
csib-pad clocks required here.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=7