Re: [PATCH v7 2/2] arm64: dts: imx95: Add support for Data Modul i.MX95 eDM SBC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] arm64: dts: imx95: missing pinmux for Ethernet PHY IRQ on
  GPIO1_IO10
- [Low] arm64: dts: imx95: unused backlight pinctrl node and header
  includes
--

commit 08308b97a054b075daa4e1d5655d37470b104a88
Author: Marek Vasut <marex@nabladev.com>

arm64: dts: imx95: Add support for Data Modul i.MX95 eDM SBC

This commit adds a device tree for the Data Modul i.MX95 eDM SBC board.

> diff --git a/arch/arm64/boot/dts/freescale/imx95-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx95-data-modul-edm-sbc.dts
> new file mode 100644
> index 0000000000000..5ca26c6ab665f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx95-data-modul-edm-sbc.dts
> @@ -0,0 +1,1079 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2025-2026 Marek Vasut <marex@nabladev.com>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/i3c/i3c.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pwm/pwm.h>
> +#include <dt-bindings/usb/pd.h>
> +#include "imx95.dtsi"

[ ... ]

> +&netc_emdio {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_emdio>;
> +	status = "okay";
> +
> +	ethphy0: ethernet-phy@1 {	/* KSZ9131RNXI U20 */
> +		compatible = "ethernet-phy-id0022.1640";
> +		reg = <1>;
> +		interrupts-extended = <&gpio1 10 IRQ_TYPE_LEVEL_LOW>;
> +		reset-assert-us = <1000>;
> +		/* RESET_N signal rise time ~100ms */
> +		reset-deassert-us = <120000>;
> +		reset-gpios = <&i2c2_gpio_expander_22 4 GPIO_ACTIVE_HIGH>;
> +	};
> +
> +	ethphy1: ethernet-phy@2 {	/* KSZ9131RNXI U22 */
> +		compatible = "ethernet-phy-id0022.1640";
> +		reg = <2>;
> +		interrupts-extended = <&gpio1 10 IRQ_TYPE_LEVEL_LOW>;
> +		reset-assert-us = <1000>;
> +		/* RESET_N signal rise time ~100ms */
> +		reset-deassert-us = <120000>;
> +		reset-gpios = <&i2c2_gpio_expander_22 5 GPIO_ACTIVE_HIGH>;
> +	};
> +};

[ ... ]

> +&scmi_iomuxc {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_hog>;
> +
> +	pinctrl_hog: hoggrp {
> +		fsl,pins = <
> +			/* PCIe 0 PEWAKE */
> +			IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14			0x4000031e
> +			/* PCIe 1 PEWAKE */
> +			IMX95_PAD_GPIO_IO37__GPIO5_IO_BIT17			0x4000031e
> +			/* BOOT_MODE2 */
> +			IMX95_PAD_SAI1_TXFS__AONMIX_TOP_GPIO1_IO_BIT11		0x4000031e
> +			/* IO_XPNDR_RST_1V8 shared by multiple expanders */
> +			IMX95_PAD_XSPI1_SS0_B__GPIO5_IO_BIT10			0x40000b9e
> +			/* IO_XPNDR_INT_1V8 shared by multiple expanders */
> +			IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11			0x40000b9e
> +		>;
> +	};
> +
> +	pinctrl_emdio: emdiogrp {
> +		fsl,pins = <
> +			IMX95_PAD_ENET2_MDC__NETCMIX_TOP_NETC_MDC		0x50e
> +			IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_NETC_MDIO		0x90e
> +		>;
> +	};

[Severity: Medium]
Should pinctrl_hog or pinctrl_emdio mux
IMX95_PAD_PDM_BIT_STREAM1__AONMIX_TOP_GPIO1_IO_BIT10 for the shared PHY
interrupt line on <&gpio1 10>?

Both ethphy0 and ethphy1 use <&gpio1 10> as their interrupt, and
pinctrl-imx-scmi does not implement .gpio_request_enable, so requesting
the line as an interrupt will not switch the pad from its default
PDM_BIT_STREAM_BIT1 mux mode.  Unless firmware pre-configures this pad as
a GPIO, PHY interrupts will not reach gpio1.

[ ... ]

> +	pinctrl_panel_backlight_lvds: backlightlvdsgrp {
> +		fsl,pins = <
> +			IMX95_PAD_GPIO_IO27__GPIO2_IO_BIT27			0x31e
> +		>;
> +	};

[Severity: Low]
This isn't a bug, but pinctrl_panel_backlight_lvds is unreferenced now
that the backlight nodes have been removed.  Also, the dt-bindings/i3c/i3c.h,
dt-bindings/pwm/pwm.h, and dt-bindings/usb/pd.h includes at the top of the
file are unused.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261114001844.30606-1-marex@nabladev.com?part=2