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From: sashiko-bot@kernel.org
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v9 2/4] PCI: dwc: Force L2 link entry on shutdown/reboot without D3cold check
Date: Sat, 14 Nov 2026 02:13:14 +0000	[thread overview]
Message-ID: <sashiko-outbox-214045@kernel.org> (raw)
In-Reply-To: <20261114-shutdown-v9-2-5430c9f242ed@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] PCI: dwc: unupdated dw_pcie_suspend_noirq() call in
  rockchip_pcie_suspend()
--

commit bf9695dc1baada77eb514fb928ceb40aa4b4b9f7
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

PCI: dwc: Force L2 link entry on shutdown/reboot without D3cold check

This commit adds a force parameter to dw_pcie_suspend_noirq() so callers
can force L2 link entry regardless of whether downstream endpoints support
D3cold, and updates callers across the DesignWare controller drivers.

> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 0ece9c4332297..f774fc6d2a248 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -902,7 +902,7 @@ static inline enum dw_pcie_ltssm dw_pcie_get_ltssm(struct dw_pcie *pci)
>  const char *dw_pcie_ltssm_status_string(enum dw_pcie_ltssm ltssm);
>  
>  #ifdef CONFIG_PCIE_DW_HOST
> -int dw_pcie_suspend_noirq(struct dw_pcie *pci);
> +int dw_pcie_suspend_noirq(struct dw_pcie *pci, bool force);
>  int dw_pcie_resume_noirq(struct dw_pcie *pci);
>  void dw_handle_msi_irq(struct dw_pcie_rp *pp);
>  void dw_pcie_msi_init(struct dw_pcie_rp *pp);
> @@ -915,7 +915,7 @@ int dw_pcie_allocate_msi_domains(struct dw_pcie_rp *pp);
>  void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn,
>  				       int where);
>  #else
> -static inline int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> +static inline int dw_pcie_suspend_noirq(struct dw_pcie *pci, bool force)
>  {
>  	return 0;
>  }

[Severity: High]
Does rockchip_pcie_suspend() in drivers/pci/controller/dwc/pcie-dw-rockchip.c
also need to be updated to pass the new force parameter?

drivers/pci/controller/dwc/pcie-dw-rockchip.c:rockchip_pcie_suspend() {
    ...
	if (rockchip->data->mode == DW_PCIE_EP_TYPE)
		return 0;

	ret = dw_pcie_suspend_noirq(pci);
    ...
}

Leaving that caller with a single argument breaks the build when
pcie-dw-rockchip.c is compiled.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261114-shutdown-v9-0-5430c9f242ed@oss.qualcomm.com?part=2

  reply	other threads:[~2026-11-14  2:13 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-14  2:00 [PATCH v9 0/4] PCI: qcom: Implement shutdown() to avoid SMMU/NoC errors on reboot Krishna Chaitanya Chundru
2026-11-14  2:00 ` [PATCH v9 1/4] PCI: host-common: Fix early bus-walk exit in d3cold_possible() Krishna Chaitanya Chundru
2026-11-14  2:07   ` sashiko-bot
2026-11-14  2:00 ` [PATCH v9 2/4] PCI: dwc: Force L2 link entry on shutdown/reboot without D3cold check Krishna Chaitanya Chundru
2026-11-14  2:13   ` sashiko-bot [this message]
2026-11-14  2:00 ` [PATCH v9 3/4] PCI: dwc: Add dw_pcie_mask_msi() to mask chained MSI without freeing domain Krishna Chaitanya Chundru
2026-11-14  2:17   ` sashiko-bot
2026-11-14  2:00 ` [PATCH v9 4/4] PCI: qcom: Implement shutdown() callback Krishna Chaitanya Chundru
2026-11-14  2:17   ` sashiko-bot

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