From: sashiko-bot@kernel.org
To: "Jiaxing Hu" <gahing@gahingwoo.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v17 11/12] arm64: dts: rockchip: add NPU (RKNN) nodes to rk3576
Date: Sat, 14 Nov 2026 03:27:39 +0000 [thread overview]
Message-ID: <sashiko-outbox-214107@kernel.org> (raw)
In-Reply-To: <f9f4f43cd1c4c8c6cee0371b4b92badf37e68832.1794615323.git.gahing@gahingwoo.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] arm64: dts: rockchip: missing resets in rk3576 NPU power-domain
nodes
--
commit 4129f134d43a1e4e19c937117eb7565caa3c233d
Author: Jiaxing Hu <gahing@gahingwoo.com>
arm64: dts: rockchip: add NPU (RKNN) nodes to rk3576
This commit adds the two RK3576 NPU core nodes and their IOMMU nodes to
rk3576.dtsi, and labels the NPU power domain node.
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> index 7828736bf9ac0..6ff95066d4701 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> @@ -1131,7 +1131,7 @@ power: power-controller {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - power-domain@RK3576_PD_NPU {
> + pd_npu: power-domain@RK3576_PD_NPU {
> reg = <RK3576_PD_NPU>;
> #power-domain-cells = <1>;
> #address-cells = <1>;
> @@ -1350,6 +1350,74 @@ power-domain@RK3576_PD_VO1 {
> };
> };
>
> + rknn_core_0: npu@27700000 {
> + compatible = "rockchip,rk3576-rknn-core";
> + reg = <0x0 0x27700000 0x0 0x1000>,
> + <0x0 0x27701000 0x0 0x1000>,
> + <0x0 0x27703000 0x0 0x1000>;
> + reg-names = "pc", "cna", "core";
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru ACLK_RKNN0>, <&cru HCLK_RKNN_ROOT>,
> + <&cru CLK_RKNN_DSU0>, <&cru PCLK_NPUTOP_ROOT>,
> + <&cru ACLK_RKNN_CBUF>, <&cru HCLK_RKNN_CBUF>;
> + clock-names = "aclk", "hclk", "npu", "pclk",
> + "aclk_cbuf", "hclk_cbuf";
> + assigned-clocks = <&cru CLK_RKNN_DSU0>;
> + assigned-clock-rates = <594000000>;
> + resets = <&cru SRST_A_RKNN0>;
> + reset-names = "srst_a";
> + power-domains = <&power RK3576_PD_NPU0>;
> + iommus = <&rknn_mmu_0>;
> + status = "disabled";
> + };
[Severity: High]
Are the power-domain@RK3576_PD_NPU0 and power-domain@RK3576_PD_NPU1 nodes
missing their resets properties (such as SRST_A_RKNN0_BIU and
SRST_A_RKNN1_BIU)?
40f898ca63cc ("pmdomain: rockchip: cycle an optional power-domain reset on
power-on") and commit "accel/rocket: let the core suspend after a reset"
rely on rockchip_pd_power() pulsing pd->reset when powering on the RK3576
NPU domains, both to clear the undefined bus interface state before QoS
and register accesses and to recover the IOMMU after a job timeout reset.
However, none of the RK3576 NPU power-domain nodes in rk3576.dtsi specify
a resets property, so pd->reset remains NULL and the bus interface reset
is never cycled:
arch/arm64/boot/dts/rockchip/rk3576.dtsi:
power-domain@RK3576_PD_NPU0 {
reg = <RK3576_PD_NPU0>;
clocks = <&cru HCLK_RKNN_ROOT>,
<&cru ACLK_RKNN0>;
pm_qos = <&qos_npu_m0>;
#power-domain-cells = <0>;
};
power-domain@RK3576_PD_NPU1 {
reg = <RK3576_PD_NPU1>;
clocks = <&cru HCLK_RKNN_ROOT>,
<&cru ACLK_RKNN1>;
pm_qos = <&qos_npu_m1>;
#power-domain-cells = <0>;
};
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1794615324.git.gahing@gahingwoo.com?part=11
next prev parent reply other threads:[~2026-11-14 3:27 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-14 3:05 [PATCH v17 00/12] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 01/12] accel/rocket: request the core clocks by name Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 02/12] accel/rocket: take the completion register writes under job_lock Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 03/12] accel/rocket: wait for a running IRQ handler before resetting a core Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:31 ` sashiko-bot
2026-11-14 3:05 ` [PATCH v17 04/12] accel/rocket: let the core suspend after a reset Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:24 ` sashiko-bot
2026-11-14 3:05 ` [PATCH v17 05/12] accel/rocket: factor the completion tail out of the IRQ handler Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 06/12] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 06/12] dt-bindings: npu: rockchip: add rockchip, rk3576-rknn-core Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 06/12] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-11-14 3:13 ` sashiko-bot
2026-11-14 3:05 ` [PATCH v17 07/12] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 08/12] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 09/12] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 10/12] accel/rocket: add a GET_PARAM ioctl for the hardware version Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:05 ` [PATCH v17 11/12] arm64: dts: rockchip: add NPU (RKNN) nodes to rk3576 Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
2026-11-14 3:27 ` sashiko-bot [this message]
2026-11-14 3:05 ` [PATCH v17 12/12] arm64: dts: rockchip: enable the NPU on rk3576-rock-4d Jiaxing Hu
2026-11-14 3:05 ` Jiaxing Hu
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