Re: [PATCH 2/3] arm64: dts: qcom: glymur: Add ASUS Ascent QN10

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] arm64: dts: qcom: glymur: unused ec_int_n_default node and
  header includes
--

commit 0ef1ffea3eda67a97118c03e5338af8067d89944
Author: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>

arm64: dts: qcom: glymur: Add ASUS Ascent QN10

This commit adds the DeviceTree for the ASUS Ascent QN10 desktop based on
the Qualcomm Snapdragon X2 Elite (Glymur) platform.

> diff --git a/arch/arm64/boot/dts/qcom/glymur-asus-ascent-qn10.dts b/arch/arm64/boot/dts/qcom/glymur-asus-ascent-qn10.dts
> new file mode 100644
> index 0000000000000..d61caa2b50222
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/glymur-asus-ascent-qn10.dts
> @@ -0,0 +1,670 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +/dts-v1/;
> +
> +#include "glymur-cob.dtsi"
> +
> +#include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

[ ... ]

> +&tlmm {
> +	gpio-reserved-ranges = <4 4>, /* EC Secure */
> +			       <10 2>, /* OOB UART */
> +			       <44 4>, /* TPM */
> +			       <65 1>, /* EC reset */
> +			       <100 1>; /* Board ID */
> +
> +	ec_int_n_default: ec-int-n-state {
> +		pins = "gpio66";
> +		function = "gpio";
> +		bias-disable;
> +	};

[Severity: Low]
Is ec_int_n_default needed here? Nothing in this file or the included
dtsi files references &ec_int_n_default. Also, neither
dt-bindings/clock/qcom,rpmh.h nor dt-bindings/pinctrl/qcom,pmic-gpio.h is
used in this file.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113-qn10-v1-0-e09b2aa7ccbe@oss.qualcomm.com?part=2