From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932392AbcELK3c (ORCPT ); Thu, 12 May 2016 06:29:32 -0400 Received: from terminus.zytor.com ([198.137.202.10]:38144 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752408AbcELK33 (ORCPT ); Thu, 12 May 2016 06:29:29 -0400 Date: Thu, 12 May 2016 03:28:20 -0700 From: tip-bot for Yazen Ghannam Message-ID: Cc: bp@alien8.de, dvlasenk@redhat.com, tony.luck@intel.com, Yazen.Ghannam@amd.com, luto@amacapital.net, hpa@zytor.com, bp@suse.de, brgerst@gmail.com, peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, torvalds@linux-foundation.org, linux-edac@vger.kernel.org Reply-To: dvlasenk@redhat.com, bp@alien8.de, brgerst@gmail.com, bp@suse.de, hpa@zytor.com, Yazen.Ghannam@amd.com, luto@amacapital.net, tony.luck@intel.com, mingo@kernel.org, peterz@infradead.org, linux-edac@vger.kernel.org, tglx@linutronix.de, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org In-Reply-To: <1462971509-3856-6-git-send-email-bp@alien8.de> References: <1462971509-3856-6-git-send-email-bp@alien8.de> To: linux-tip-commits@vger.kernel.org Subject: [tip:ras/core] x86/mce: Update AMD mcheck init to use cpu_has() facilities Git-Commit-ID: 14cddfd5308b0880abd6e58b6660f5cc8e8020f9 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 14cddfd5308b0880abd6e58b6660f5cc8e8020f9 Gitweb: http://git.kernel.org/tip/14cddfd5308b0880abd6e58b6660f5cc8e8020f9 Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:27 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:22 +0200 x86/mce: Update AMD mcheck init to use cpu_has() facilities Use cpu_has() facilities to find available RAS features rather than directly reading CPUID 0x80000007_EBX. Signed-off-by: Yazen Ghannam [ Use the struct cpuinfo_x86 ptr instead. ] Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: Tony Luck Cc: linux-edac Link: http://lkml.kernel.org/r/1462971509-3856-6-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/mcheck/mce.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index aeda446..92e5e37 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1683,11 +1683,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) break; case X86_VENDOR_AMD: { - u32 ebx = cpuid_ebx(0x80000007); - - mce_flags.overflow_recov = !!(ebx & BIT(0)); - mce_flags.succor = !!(ebx & BIT(1)); - mce_flags.smca = !!(ebx & BIT(3)); + mce_flags.overflow_recov = !!cpu_has(c, X86_FEATURE_OVERFLOW_RECOV); + mce_flags.succor = !!cpu_has(c, X86_FEATURE_SUCCOR); + mce_flags.smca = !!cpu_has(c, X86_FEATURE_SMCA); /* * Install proper ops for Scalable MCA enabled processors