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From: tip-bot for Jan Kiszka <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, mingo@kernel.org, hpa@zytor.com,
	jan.kiszka@siemens.com, tglx@linutronix.de
Subject: [tip:x86/platform] x86: Introduce and use MP IRQ trigger and polarity defines
Date: Sun, 14 Jan 2018 12:34:55 -0800	[thread overview]
Message-ID: <tip-a09c5ec00a120dae52eceef3eebff93ed729bb43@git.kernel.org> (raw)
In-Reply-To: <60809926663a1d38e2a5db47d020d6e2e7a70019.1511770314.git.jan.kiszka@siemens.com>

Commit-ID:  a09c5ec00a120dae52eceef3eebff93ed729bb43
Gitweb:     https://git.kernel.org/tip/a09c5ec00a120dae52eceef3eebff93ed729bb43
Author:     Jan Kiszka <jan.kiszka@siemens.com>
AuthorDate: Mon, 27 Nov 2017 09:11:45 +0100
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 14 Jan 2018 21:11:54 +0100

x86: Introduce and use MP IRQ trigger and polarity defines

MP_IRQDIR_* constants pointed in the right direction but remained unused so
far: It's cleaner to use symbolic values for the IRQ flags in the MP config
table. That also saves some comments.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: jailhouse-dev@googlegroups.com
Link: https://lkml.kernel.org/r/60809926663a1d38e2a5db47d020d6e2e7a70019.1511770314.git.jan.kiszka@siemens.com

---
 arch/x86/include/asm/mpspec_def.h | 14 +++++++++++---
 arch/x86/kernel/apic/io_apic.c    | 20 ++++++++++----------
 arch/x86/kernel/mpparse.c         | 23 ++++++++++++++---------
 arch/x86/platform/intel-mid/sfi.c |  5 ++---
 4 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/arch/x86/include/asm/mpspec_def.h b/arch/x86/include/asm/mpspec_def.h
index a6bec80..6fb923a 100644
--- a/arch/x86/include/asm/mpspec_def.h
+++ b/arch/x86/include/asm/mpspec_def.h
@@ -128,9 +128,17 @@ enum mp_irq_source_types {
 	mp_ExtINT = 3
 };
 
-#define MP_IRQDIR_DEFAULT	0
-#define MP_IRQDIR_HIGH		1
-#define MP_IRQDIR_LOW		3
+#define MP_IRQPOL_DEFAULT	0x0
+#define MP_IRQPOL_ACTIVE_HIGH	0x1
+#define MP_IRQPOL_RESERVED	0x2
+#define MP_IRQPOL_ACTIVE_LOW	0x3
+#define MP_IRQPOL_MASK		0x3
+
+#define MP_IRQTRIG_DEFAULT	0x0
+#define MP_IRQTRIG_EDGE		0x4
+#define MP_IRQTRIG_RESERVED	0x8
+#define MP_IRQTRIG_LEVEL	0xc
+#define MP_IRQTRIG_MASK		0xc
 
 #define MP_APIC_ALL	0xFF
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 8a79634..8ad2e41 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -800,18 +800,18 @@ static int irq_polarity(int idx)
 	/*
 	 * Determine IRQ line polarity (high active or low active):
 	 */
-	switch (mp_irqs[idx].irqflag & 0x03) {
-	case 0:
+	switch (mp_irqs[idx].irqflag & MP_IRQPOL_MASK) {
+	case MP_IRQPOL_DEFAULT:
 		/* conforms to spec, ie. bus-type dependent polarity */
 		if (test_bit(bus, mp_bus_not_pci))
 			return default_ISA_polarity(idx);
 		else
 			return default_PCI_polarity(idx);
-	case 1:
+	case MP_IRQPOL_ACTIVE_HIGH:
 		return IOAPIC_POL_HIGH;
-	case 2:
+	case MP_IRQPOL_RESERVED:
 		pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");
-	case 3:
+	case MP_IRQPOL_ACTIVE_LOW:
 	default: /* Pointless default required due to do gcc stupidity */
 		return IOAPIC_POL_LOW;
 	}
@@ -845,8 +845,8 @@ static int irq_trigger(int idx)
 	/*
 	 * Determine IRQ trigger mode (edge or level sensitive):
 	 */
-	switch ((mp_irqs[idx].irqflag >> 2) & 0x03) {
-	case 0:
+	switch (mp_irqs[idx].irqflag & MP_IRQTRIG_MASK) {
+	case MP_IRQTRIG_DEFAULT:
 		/* conforms to spec, ie. bus-type dependent trigger mode */
 		if (test_bit(bus, mp_bus_not_pci))
 			trigger = default_ISA_trigger(idx);
@@ -854,11 +854,11 @@ static int irq_trigger(int idx)
 			trigger = default_PCI_trigger(idx);
 		/* Take EISA into account */
 		return eisa_irq_trigger(idx, bus, trigger);
-	case 1:
+	case MP_IRQTRIG_EDGE:
 		return IOAPIC_EDGE;
-	case 2:
+	case MP_IRQTRIG_RESERVED:
 		pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");
-	case 3:
+	case MP_IRQTRIG_LEVEL:
 	default: /* Pointless default required due to do gcc stupidity */
 		return IOAPIC_LEVEL;
 	}
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 3a4b128..27d0a17 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -281,7 +281,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
 	int ELCR_fallback = 0;
 
 	intsrc.type = MP_INTSRC;
-	intsrc.irqflag = 0;	/* conforming */
+	intsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT;
 	intsrc.srcbus = 0;
 	intsrc.dstapic = mpc_ioapic_id(0);
 
@@ -324,10 +324,13 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
 			 *  copy that information over to the MP table in the
 			 *  irqflag field (level sensitive, active high polarity).
 			 */
-			if (ELCR_trigger(i))
-				intsrc.irqflag = 13;
-			else
-				intsrc.irqflag = 0;
+			if (ELCR_trigger(i)) {
+				intsrc.irqflag = MP_IRQTRIG_LEVEL |
+						 MP_IRQPOL_ACTIVE_HIGH;
+			} else {
+				intsrc.irqflag = MP_IRQTRIG_DEFAULT |
+						 MP_IRQPOL_DEFAULT;
+			}
 		}
 
 		intsrc.srcbusirq = i;
@@ -419,7 +422,7 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type)
 	construct_ioapic_table(mpc_default_type);
 
 	lintsrc.type = MP_LINTSRC;
-	lintsrc.irqflag = 0;		/* conforming */
+	lintsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT;
 	lintsrc.srcbusid = 0;
 	lintsrc.srcbusirq = 0;
 	lintsrc.destapic = MP_APIC_ALL;
@@ -664,7 +667,7 @@ static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
 	if (m->irqtype != mp_INT)
 		return 0;
 
-	if (m->irqflag != 0x0f)
+	if (m->irqflag != (MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW))
 		return 0;
 
 	/* not legacy */
@@ -673,7 +676,8 @@ static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
 		if (mp_irqs[i].irqtype != mp_INT)
 			continue;
 
-		if (mp_irqs[i].irqflag != 0x0f)
+		if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL |
+					   MP_IRQPOL_ACTIVE_LOW))
 			continue;
 
 		if (mp_irqs[i].srcbus != m->srcbus)
@@ -784,7 +788,8 @@ static int  __init replace_intsrc_all(struct mpc_table *mpc,
 		if (mp_irqs[i].irqtype != mp_INT)
 			continue;
 
-		if (mp_irqs[i].irqflag != 0x0f)
+		if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL |
+					   MP_IRQPOL_ACTIVE_LOW))
 			continue;
 
 		if (nr_m_spare > 0) {
diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c
index 19b43e3..7be1e1f 100644
--- a/arch/x86/platform/intel-mid/sfi.c
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -96,8 +96,7 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)
 			pentry->freq_hz, pentry->irq);
 		mp_irq.type = MP_INTSRC;
 		mp_irq.irqtype = mp_INT;
-		/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
-		mp_irq.irqflag = 5;
+		mp_irq.irqflag = MP_IRQTRIG_EDGE | MP_IRQPOL_ACTIVE_HIGH;
 		mp_irq.srcbus = MP_BUS_ISA;
 		mp_irq.srcbusirq = pentry->irq;	/* IRQ */
 		mp_irq.dstapic = MP_APIC_ALL;
@@ -168,7 +167,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)
 			totallen, (u32)pentry->phys_addr, pentry->irq);
 		mp_irq.type = MP_INTSRC;
 		mp_irq.irqtype = mp_INT;
-		mp_irq.irqflag = 0xf;	/* level trigger and active low */
+		mp_irq.irqflag = MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW;
 		mp_irq.srcbus = MP_BUS_ISA;
 		mp_irq.srcbusirq = pentry->irq;	/* IRQ */
 		mp_irq.dstapic = MP_APIC_ALL;

  reply	other threads:[~2018-01-14 20:36 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-27  8:11 [PATCH v2 00/12] x86: Add support for running as secondary Jailhouse guest Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 01/12] x86/apic: Install an empty physflat_init_apic_ldr Jan Kiszka
2018-01-14 20:34   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 02/12] x86: Control warm reset setup via legacy feature flag Jan Kiszka
2018-01-14 20:34   ` [tip:x86/platform] x86/platform: " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 03/12] x86: Introduce and use MP IRQ trigger and polarity defines Jan Kiszka
2018-01-14 20:34   ` tip-bot for Jan Kiszka [this message]
2017-11-27  8:11 ` [PATCH v2 04/12] x86/jailhouse: Add infrastructure for running in non-root cell Jan Kiszka
2018-01-14 20:35   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 05/12] x86/jailhouse: Enable APIC and SMP support Jan Kiszka
2018-01-14 20:36   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 06/12] x86/jailhouse: Enable PMTIMER Jan Kiszka
2018-01-14 20:36   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 07/12] x86/jailhouse: Set up timekeeping Jan Kiszka
2018-01-14 20:37   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 08/12] x86/jailhouse: Avoid access of unsupported platform resources Jan Kiszka
2018-01-14 20:37   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 09/12] x86/jailhouse: Silence ACPI warning Jan Kiszka
2018-01-14 20:37   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 10/12] x86/jailhouse: Halt instead of failing to restart Jan Kiszka
2018-01-14 20:38   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 11/12] x86/jailhouse: Wire up IOAPIC for legacy UART ports Jan Kiszka
2018-01-14 20:38   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2017-11-27  8:11 ` [PATCH v2 12/12] x86/jailhouse: Initialize PCI support Jan Kiszka
2018-01-14 20:39   ` [tip:x86/platform] " tip-bot for Jan Kiszka
2018-01-22 22:26   ` [PATCH v2 12/12] " Bjorn Helgaas
2018-01-23  7:49     ` Jan Kiszka

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