From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751457AbdGRK4E (ORCPT ); Tue, 18 Jul 2017 06:56:04 -0400 Received: from terminus.zytor.com ([65.50.211.136]:52695 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751348AbdGRK4D (ORCPT ); Tue, 18 Jul 2017 06:56:03 -0400 Date: Tue, 18 Jul 2017 03:47:50 -0700 From: tip-bot for Tom Lendacky Message-ID: Cc: corbet@lwn.net, torvalds@linux-foundation.org, lwoodman@redhat.com, thomas.lendacky@amd.com, peterz@infradead.org, tglx@linutronix.de, dyoung@redhat.com, bp@alien8.de, linux-kernel@vger.kernel.org, glider@google.com, mingo@kernel.org, rkrcmar@redhat.com, riel@redhat.com, arnd@arndb.de, dvyukov@google.com, luto@kernel.org, matt@codeblueprint.co.uk, konrad.wilk@oracle.com, bp@suse.de, toshi.kani@hpe.com, aryabinin@virtuozzo.com, mst@redhat.com, brijesh.singh@amd.com, hpa@zytor.com, pbonzini@redhat.com Reply-To: mingo@kernel.org, glider@google.com, linux-kernel@vger.kernel.org, bp@alien8.de, dyoung@redhat.com, tglx@linutronix.de, peterz@infradead.org, thomas.lendacky@amd.com, lwoodman@redhat.com, torvalds@linux-foundation.org, corbet@lwn.net, hpa@zytor.com, pbonzini@redhat.com, mst@redhat.com, brijesh.singh@amd.com, aryabinin@virtuozzo.com, toshi.kani@hpe.com, bp@suse.de, konrad.wilk@oracle.com, matt@codeblueprint.co.uk, luto@kernel.org, dvyukov@google.com, arnd@arndb.de, riel@redhat.com, rkrcmar@redhat.com In-Reply-To: References: To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/mm] x86/mm/pat: Set write-protect cache mode for full PAT support Git-Commit-ID: aac7b79eea6118dee3da9b99dcd564471672806d X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: aac7b79eea6118dee3da9b99dcd564471672806d Gitweb: http://git.kernel.org/tip/aac7b79eea6118dee3da9b99dcd564471672806d Author: Tom Lendacky AuthorDate: Mon, 17 Jul 2017 16:09:59 -0500 Committer: Ingo Molnar CommitDate: Tue, 18 Jul 2017 11:37:58 +0200 x86/mm/pat: Set write-protect cache mode for full PAT support For processors that support PAT, set the write-protect cache mode (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05). Signed-off-by: Tom Lendacky Reviewed-by: Thomas Gleixner Acked-by: Borislav Petkov Cc: Alexander Potapenko Cc: Andrey Ryabinin Cc: Andy Lutomirski Cc: Arnd Bergmann Cc: Borislav Petkov Cc: Brijesh Singh Cc: Dave Young Cc: Dmitry Vyukov Cc: Jonathan Corbet Cc: Konrad Rzeszutek Wilk Cc: Larry Woodman Cc: Linus Torvalds Cc: Matt Fleming Cc: Michael S. Tsirkin Cc: Paolo Bonzini Cc: Peter Zijlstra Cc: Radim Krčmář Cc: Rik van Riel Cc: Toshimitsu Kani Cc: kasan-dev@googlegroups.com Cc: kvm@vger.kernel.org Cc: linux-arch@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-efi@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/ade53b63d4dbffbfc3cb08fb62024647059c8688.1500319216.git.thomas.lendacky@amd.com Signed-off-by: Ingo Molnar --- arch/x86/mm/pat.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index 4597950..88990ab 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c @@ -293,7 +293,7 @@ void init_cache_modes(void) * pat_init - Initialize PAT MSR and PAT table * * This function initializes PAT MSR and PAT table with an OS-defined value - * to enable additional cache attributes, WC and WT. + * to enable additional cache attributes, WC, WT and WP. * * This function must be called on all CPUs using the specific sequence of * operations defined in Intel SDM. mtrr_rendezvous_handler() provides this @@ -352,7 +352,7 @@ void pat_init(void) * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS * 011 3 UC : _PAGE_CACHE_MODE_UC * 100 4 WB : Reserved - * 101 5 WC : Reserved + * 101 5 WP : _PAGE_CACHE_MODE_WP * 110 6 UC-: Reserved * 111 7 WT : _PAGE_CACHE_MODE_WT * @@ -360,7 +360,7 @@ void pat_init(void) * corresponding types in the presence of PAT errata. */ pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | - PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT); + PAT(4, WB) | PAT(5, WP) | PAT(6, UC_MINUS) | PAT(7, WT); } if (!boot_cpu_done) {