From: tip-bot for Vince Weaver <vincent.weaver@maine.edu>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, paulus@samba.org, hpa@zytor.com,
mingo@kernel.org, lawrence.f.meadows@intel.com,
a.p.zijlstra@chello.nl, acme@ghostprotocols.net,
vincent.weaver@maine.edu, tglx@linutronix.de
Subject: [tip:perf/urgent] perf/x86: Make Intel KNC use full 40-bit width of counters
Date: Wed, 24 Oct 2012 03:34:23 -0700 [thread overview]
Message-ID: <tip-ae5ba47a990a18c869d66916fd72fb334c45cf91@git.kernel.org> (raw)
In-Reply-To: <alpine.DEB.2.02.1210171302140.23243@vincent-weaver-1.um.maine.edu>
Commit-ID: ae5ba47a990a18c869d66916fd72fb334c45cf91
Gitweb: http://git.kernel.org/tip/ae5ba47a990a18c869d66916fd72fb334c45cf91
Author: Vince Weaver <vincent.weaver@maine.edu>
AuthorDate: Wed, 17 Oct 2012 13:03:21 -0400
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 24 Oct 2012 12:00:48 +0200
perf/x86: Make Intel KNC use full 40-bit width of counters
Early versions of Intel KNC chips have a bug where bits above 32
were not properly set. We worked around this by only using the
bottom 32 bits (out of 40 that should be available).
It turns out this workaround breaks overflow handling.
The buggy silicon will in theory never be used in production
systems, so remove this workaround so we get proper overflow
support.
Signed-off-by: Vince Weaver <vincent.weaver@maine.edu>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: eranian@gmail.com
Cc: Meadows Lawrence F <lawrence.f.meadows@intel.com>
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171302140.23243@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_knc.c | 7 +++----
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_knc.c b/arch/x86/kernel/cpu/perf_event_knc.c
index 7c46bfd..73bcfbd 100644
--- a/arch/x86/kernel/cpu/perf_event_knc.c
+++ b/arch/x86/kernel/cpu/perf_event_knc.c
@@ -226,12 +226,11 @@ static __initconst struct x86_pmu knc_pmu = {
.event_map = knc_pmu_event_map,
.max_events = ARRAY_SIZE(knc_perfmon_event_map),
.apic = 1,
- .max_period = (1ULL << 31) - 1,
+ .max_period = (1ULL << 39) - 1,
.version = 0,
.num_counters = 2,
- /* in theory 40 bits, early silicon is buggy though */
- .cntval_bits = 32,
- .cntval_mask = (1ULL << 32) - 1,
+ .cntval_bits = 40,
+ .cntval_mask = (1ULL << 40) - 1,
.get_event_constraints = x86_get_event_constraints,
.event_constraints = knc_event_constraints,
.format_attrs = intel_knc_formats_attr,
next prev parent reply other threads:[~2012-10-24 10:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-17 17:02 [PATCH 0/3] perf_event: enable overflow interrupts on KNC Vince Weaver
2012-10-17 17:03 ` [PATCH 1/3] Make KNC use full 40-bit width of counters Vince Weaver
2012-10-24 10:34 ` tip-bot for Vince Weaver [this message]
2012-10-17 17:04 ` [PATCH 2/3] perf_event: Remove cpuc->enable check on KNC event enable/disable Vince Weaver
2012-10-24 10:35 ` [tip:perf/urgent] perf/x86: Remove cpuc-> enable check on Intl " tip-bot for Vince Weaver
2012-10-17 17:05 ` [PATCH 3/3] perf_event: Enable overflow on KNC with a custom knc_pmu_handle_irq() Vince Weaver
2012-10-24 10:36 ` [tip:perf/urgent] perf/x86: Enable overflow on Intel " tip-bot for Vince Weaver
2012-10-17 18:07 ` [PATCH 0/3] perf_event: enable overflow interrupts on KNC Ingo Molnar
2012-10-17 20:24 ` Vince Weaver
2012-10-17 21:47 ` Ingo Molnar
2012-10-18 17:54 ` Vince Weaver
2012-10-18 18:54 ` Ingo Molnar
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