From: tip-bot for Qais Yousef <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: jason@lakedaemon.net, linux-mips@linux-mips.org,
linux-kernel@vger.kernel.org, hpa@zytor.com, tglx@linutronix.de,
mingo@kernel.org, qsyousef@gmail.com, ralf@linux-mips.org,
lisa.parratt@imgtec.com, qais.yousef@imgtec.com,
jiang.liu@linux.intel.com, marc.zyngier@arm.com
Subject: [tip:irq/core] genirq: Add a new generic IPI reservation code to irq core
Date: Thu, 25 Feb 2016 02:02:37 -0800 [thread overview]
Message-ID: <tip-d17bf24e695290d3fe7943aca52ab48098a10653@git.kernel.org> (raw)
In-Reply-To: <1449580830-23652-9-git-send-email-qais.yousef@imgtec.com>
Commit-ID: d17bf24e695290d3fe7943aca52ab48098a10653
Gitweb: http://git.kernel.org/tip/d17bf24e695290d3fe7943aca52ab48098a10653
Author: Qais Yousef <qais.yousef@imgtec.com>
AuthorDate: Tue, 8 Dec 2015 13:20:19 +0000
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 25 Feb 2016 10:56:56 +0100
genirq: Add a new generic IPI reservation code to irq core
Add a generic mechanism to dynamically allocate an IPI. Depending on the
underlying implementation this creates either a single Linux irq or a
consective range of Linux irqs. The Linux irq is used later to send IPIs to
other CPUs.
[ tglx: Massaged the code and removed the 'consecutive mask' restriction for
the single IRQ case ]
Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: <jason@lakedaemon.net>
Cc: <marc.zyngier@arm.com>
Cc: <jiang.liu@linux.intel.com>
Cc: <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>
Cc: <lisa.parratt@imgtec.com>
Cc: Qais Yousef <qsyousef@gmail.com>
Link: http://lkml.kernel.org/r/1449580830-23652-9-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
include/linux/irq.h | 3 +
include/linux/irqdomain.h | 5 ++
kernel/irq/Makefile | 1 +
kernel/irq/ipi.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 146 insertions(+)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index a32b47f..95f4f66 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -940,4 +940,7 @@ static inline u32 irq_reg_readl(struct irq_chip_generic *gc,
return readl(gc->reg_base + reg_offset);
}
+/* Contrary to Linux irqs, for hardware irqs the irq number 0 is valid */
+#define INVALID_HWIRQ (~0UL)
+
#endif /* _LINUX_IRQ_H */
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index c466cc1..ed48594 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -344,6 +344,11 @@ int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr,
const u32 *intspec, unsigned int intsize,
irq_hw_number_t *out_hwirq, unsigned int *out_type);
+/* IPI functions */
+unsigned int irq_reserve_ipi(struct irq_domain *domain,
+ const struct cpumask *dest);
+void irq_destroy_ipi(unsigned int irq);
+
/* V2 interfaces to support hierarchy IRQ domains. */
extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain,
unsigned int virq);
diff --git a/kernel/irq/Makefile b/kernel/irq/Makefile
index 2fc9cbd..2ee42e9 100644
--- a/kernel/irq/Makefile
+++ b/kernel/irq/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_GENERIC_PENDING_IRQ) += migration.o
obj-$(CONFIG_GENERIC_IRQ_MIGRATION) += cpuhotplug.o
obj-$(CONFIG_PM_SLEEP) += pm.o
obj-$(CONFIG_GENERIC_MSI_IRQ) += msi.o
+obj-$(CONFIG_GENERIC_IRQ_IPI) += ipi.o
diff --git a/kernel/irq/ipi.c b/kernel/irq/ipi.c
new file mode 100644
index 0000000..340af27
--- /dev/null
+++ b/kernel/irq/ipi.c
@@ -0,0 +1,137 @@
+/*
+ * linux/kernel/irq/ipi.c
+ *
+ * Copyright (C) 2015 Imagination Technologies Ltd
+ * Author: Qais Yousef <qais.yousef@imgtec.com>
+ *
+ * This file contains driver APIs to the IPI subsystem.
+ */
+
+#define pr_fmt(fmt) "genirq/ipi: " fmt
+
+#include <linux/irqdomain.h>
+#include <linux/irq.h>
+
+/**
+ * irq_reserve_ipi() - Setup an IPI to destination cpumask
+ * @domain: IPI domain
+ * @dest: cpumask of cpus which can receive the IPI
+ *
+ * Allocate a virq that can be used to send IPI to any CPU in dest mask.
+ *
+ * On success it'll return linux irq number and 0 on failure
+ */
+unsigned int irq_reserve_ipi(struct irq_domain *domain,
+ const struct cpumask *dest)
+{
+ unsigned int nr_irqs, offset;
+ struct irq_data *data;
+ int virq, i;
+
+ if (!domain ||!irq_domain_is_ipi(domain)) {
+ pr_warn("Reservation on a non IPI domain\n");
+ return 0;
+ }
+
+ if (!cpumask_subset(dest, cpu_possible_mask)) {
+ pr_warn("Reservation is not in possible_cpu_mask\n");
+ return 0;
+ }
+
+ nr_irqs = cpumask_weight(dest);
+ if (!nr_irqs) {
+ pr_warn("Reservation for empty destination mask\n");
+ return 0;
+ }
+
+ if (irq_domain_is_ipi_single(domain)) {
+ /*
+ * If the underlying implementation uses a single HW irq on
+ * all cpus then we only need a single Linux irq number for
+ * it. We have no restrictions vs. the destination mask. The
+ * underlying implementation can deal with holes nicely.
+ */
+ nr_irqs = 1;
+ offset = 0;
+ } else {
+ unsigned int next;
+
+ /*
+ * The IPI requires a seperate HW irq on each CPU. We require
+ * that the destination mask is consecutive. If an
+ * implementation needs to support holes, it can reserve
+ * several IPI ranges.
+ */
+ offset = cpumask_first(dest);
+ /*
+ * Find a hole and if found look for another set bit after the
+ * hole. For now we don't support this scenario.
+ */
+ next = cpumask_next_zero(offset, dest);
+ if (next < nr_cpu_ids)
+ next = cpumask_next(next, dest);
+ if (next < nr_cpu_ids) {
+ pr_warn("Destination mask has holes\n");
+ return 0;
+ }
+ }
+
+ virq = irq_domain_alloc_descs(-1, nr_irqs, 0, NUMA_NO_NODE);
+ if (virq <= 0) {
+ pr_warn("Can't reserve IPI, failed to alloc descs\n");
+ return 0;
+ }
+
+ virq = __irq_domain_alloc_irqs(domain, virq, nr_irqs, NUMA_NO_NODE,
+ (void *) dest, true);
+
+ if (virq <= 0) {
+ pr_warn("Can't reserve IPI, failed to alloc hw irqs\n");
+ goto free_descs;
+ }
+
+ for (i = 0; i < nr_irqs; i++) {
+ data = irq_get_irq_data(virq + i);
+ cpumask_copy(data->common->affinity, dest);
+ data->common->ipi_offset = offset;
+ }
+ return virq;
+
+free_descs:
+ irq_free_descs(virq, nr_irqs);
+ return 0;
+}
+
+/**
+ * irq_destroy_ipi() - unreserve an IPI that was previously allocated
+ * @irq: linux irq number to be destroyed
+ *
+ * Return the IPIs allocated with irq_reserve_ipi() to the system destroying
+ * all virqs associated with them.
+ */
+void irq_destroy_ipi(unsigned int irq)
+{
+ struct irq_data *data = irq_get_irq_data(irq);
+ struct cpumask *ipimask = data ? irq_data_get_affinity_mask(data) : NULL;
+ struct irq_domain *domain;
+ unsigned int nr_irqs;
+
+ if (!irq || !data || !ipimask)
+ return;
+
+ domain = data->domain;
+ if (WARN_ON(domain == NULL))
+ return;
+
+ if (!irq_domain_is_ipi(domain)) {
+ pr_warn("Trying to destroy a non IPI domain!\n");
+ return;
+ }
+
+ if (irq_domain_is_ipi_per_cpu(domain))
+ nr_irqs = cpumask_weight(ipimask);
+ else
+ nr_irqs = 1;
+
+ irq_domain_free_irqs(irq, nr_irqs);
+}
next prev parent reply other threads:[~2016-02-25 10:03 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-08 13:20 [PATCH v4 00/19] Implement generic IPI support mechanism Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2015-12-08 13:20 ` [PATCH v4 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:00 ` [tip:irq/core] genirq: Add new IPI irqdomain flags tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 02/19] genirq: Add DOMAIN_BUS_IPI Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:00 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:01 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 04/19] genirq: Add struct ipi_mapping and its helper functions Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2015-12-08 13:20 ` [PATCH v4 05/19] genirq: Add ipi_offset to irq_common_data Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:01 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 06/19] genirq: Add an extra comment about the use of affinity in irq_common_data Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:01 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 07/19] genirq: Make irq_domain_alloc_descs() non static Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:02 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 08/19] genirq: Add a new generic IPI reservation code to irq core Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:02 ` tip-bot for Qais Yousef [this message]
2015-12-08 13:20 ` [PATCH v4 09/19] genirq: Add a new function to get IPI reverse mapping Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:02 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 10/19] genirq: Add a new irq_send_ipi() to irq_chip Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:03 ` [tip:irq/core] genirq: Add send_ipi callbacks " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 11/19] genirq: Implement ipi_send_{mask, single}() Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:03 ` [tip:irq/core] genirq: Implement ipi_send_mask/single() tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 12/19] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:03 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 13/19] irqchip/mips-gic: Add device " Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:04 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 14/19] irqchip/mips-gic: Use gic_vpes instead of NR_CPUS Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:04 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 15/19] irqchip/mips-gic: Clear percpu_masks correctly when mapping Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:04 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 16/19] MIPS: Add generic SMP IPI support Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:05 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 17/19] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2015-12-09 10:30 ` kbuild test robot
2015-12-09 10:30 ` kbuild test robot
2016-02-25 10:05 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 18/19] MIPS: Delete smp-gic.c Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:05 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 13:20 ` [PATCH v4 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs Qais Yousef
2015-12-08 13:20 ` Qais Yousef
2016-02-25 10:06 ` [tip:irq/core] " tip-bot for Qais Yousef
2015-12-08 21:20 ` [PATCH v4 00/19] Implement generic IPI support mechanism Thomas Gleixner
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