From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keith Packard <keithp@keithp.com>
Subject: Re: [PATCH] drm/i915: Fix unfenced alignment on pre-G33
	hardware
Date: Mon, 18 Jul 2011 09:35:08 -0700
Message-ID: <yun1uxnpmwz.fsf@aiko.keithp.com>
References: <1310200285-17692-1-git-send-email-chris@chris-wilson.co.uk>
	<yun4o2jpnqr.fsf@aiko.keithp.com>
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="===============1230681119=="
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from keithp.com (home.keithp.com [63.227.221.253])
	by gabe.freedesktop.org (Postfix) with ESMTP id D02F69E779
	for <intel-gfx@lists.freedesktop.org>;
	Mon, 18 Jul 2011 09:35:13 -0700 (PDT)
In-Reply-To: <yun4o2jpnqr.fsf@aiko.keithp.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

--===============1230681119==
Content-Type: multipart/signed; boundary="=-=-=";
	micalg=pgp-sha1; protocol="application/pgp-signature"

--=-=-=
Content-Transfer-Encoding: quoted-printable

On Mon, 18 Jul 2011 09:17:16 -0700, Keith Packard <keithp@keithp.com> wrote:
Non-text part: multipart/signed
> On Sat,  9 Jul 2011 09:31:25 +0100, Chris Wilson <chris@chris-wilson.co.u=
k> wrote:
>=20
> >  uint32_t
> > -i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj)
> > +i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj,
> > +				    int tiling_mode)
> ...
> > +	return i915_gem_get_gtt_size(obj);
>=20
> I think you want to pass the new tiling mode to this function rather
> than using the object's existing tiling mode. Seems like most of the
> issues could easily be explained by using the stale value when trying to
> change tiling modes.

Actually, given that the only thing you need from the object is the
size, it would be better to just create functions which take just the
size and tiling mode and computes the gtt size required to map
that. Like:

i915_gem_get_unfenced_gtt_alignment(struct drm_device *dev, size_t size, un=
signed tiling_mode)

i915_gem_get_gtt_size(struct drm_device *dev, size_t size, unsigned tiling_=
mode)

Then you can be sure you're using the correct tiling mode in all of the
computations.

=2D-=20
keith.packard@intel.com

--=-=-=
Content-Type: application/pgp-signature

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)

iD8DBQFOJGC8Qp8BWwlsTdMRAkuSAKDQu+Y2T+AXtRC5WxHxfqHYZgZjggCgnOdk
lA8mbkNO5K56qfH3Jux/mh0=
=HosV
-----END PGP SIGNATURE-----
--=-=-=--

--===============1230681119==
Content-Type: text/plain; charset="us-ascii"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Content-Disposition: inline

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

--===============1230681119==--