From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keith Packard <keithp@keithp.com>
Subject: Re: [PATCH fixes] drm/i915: Fix unfenced alignment on
	pre-G33 hardware
Date: Mon, 06 Jun 2011 11:09:30 -0700
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On Mon, 06 Jun 2011 18:50:16 +0100, Chris Wilson <chris@chris-wilson.co.uk>=
 wrote:

> Hah. Anyway it is actually irrelevant as it turns out, the kernel is brok=
en
> with any per-surface tiling on gen2/gen3.

Right, seems like we need to signal user space that tiling works now,
which should involve a new ioctl of some form?

> Yes, I can. But the simple bug fix doesn't fix anything without the other
> chunk. Do you still want it split?

Isn't it a general bug? We're asking for an alignment value using the
wrong tiling mode when changing tiling modes.

=2D-=20
keith.packard@intel.com

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-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)

iD8DBQFN7RfaQp8BWwlsTdMRAkfzAJ9zWO0bmGNnEIUsUD93YklcT559bgCfT6w2
2/yTUdTDwBxi1eV6gbgNND8=
=gOC5
-----END PGP SIGNATURE-----
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