From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keith Packard Subject: Re: CUDA port for intel graphics Date: Wed, 23 Jun 2010 08:32:42 -0700 Message-ID: References: <4C21B45F.8040204@mail.gatech.edu> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2029356788==" Return-path: Received: from keithp.com (home.keithp.com [63.227.221.253]) by gabe.freedesktop.org (Postfix) with ESMTP id 7070A9E763 for ; Wed, 23 Jun 2010 08:32:44 -0700 (PDT) In-Reply-To: <4C21B45F.8040204@mail.gatech.edu> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Mime-version: 1.0 Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Gregory Diamos , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============2029356788== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Wed, 23 Jun 2010 00:14:39 -0700, Gregory Diamos wrote: > 1. Is there an interface for writing directly to the GPU ring buffer=20 > that is exposed by the driver? If not, would it be straightforward to=20 > add such an interface? Take a look at 'drm' in the mesa git repository; that contains a library (libdrm) which provides to ability to execute arbitrary commands in the GPU with in-kernel memory management. This is used by the X 2D driver, the Mesa GL driver and the VaAPI library. git clone git://anongit.freedesktop.org/git/mesa/drm > 2. Are there any restrictions (security, DRM, etc) for loading/executing= =20 > binaries on the media pipeline? Nope. You need permission to open the device, which is currently managed by having a connection to the X server, so for now you'd have to be running under X. There's no requirement to deal with X other than authenticating access to the device though. It would be useful to fix this so that arbitrary programs could use the GPU without needing to be authenticated through the window system. > 3. How modular is the driver? Is there an interface for user-level=20 > applications to issue hardware commands in a way that is isolated and > time-shared with commands from the graphics driver? If not, would it be= =20 > straightforward to modify the driver to disable the graphics components=20 > of the driver and retain only an interface for passing commands to the=20 > device? Yes, that's precisely what the DRM infrastructure provides -- the ability to execute arbitrary commands on the hardware from multiple programs at the same time. > 4. How is memory sharing between the CPU and GPU handled? Is it possible= =20 > to map memory from the CPU's address space into the GPU's address space?= =20 > Sorry if this is already documented somewhere, I might have missed > it. As above, the kernel is used to manage memory objects and the driver knows how to deal with the lack of hardware cache coherency with help From=20the application. =2D-=20 keith.packard@intel.com --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iD8DBQFMIikaQp8BWwlsTdMRAs0LAKDQv5lBE096IzZCWfUbRDCXmus1pwCguYbx V2cLoSea+FZWQBaahzuqBYA= =xweq -----END PGP SIGNATURE----- --=-=-=-- --===============2029356788== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============2029356788==--