From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keith Packard Subject: Re: [PATCH] drm/i915: Reset GMBUS controller after NAK Date: Wed, 30 Mar 2011 10:22:48 -0700 Message-ID: References: <1301501231-27133-1-git-send-email-chris@chris-wilson.co.uk> <1bdc18$k257pk@fmsmga002.fm.intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2106135615==" Return-path: Received: from keithp.com (home.keithp.com [63.227.221.253]) by gabe.freedesktop.org (Postfix) with ESMTP id C9F819E758 for ; Wed, 30 Mar 2011 10:22:52 -0700 (PDT) In-Reply-To: <1bdc18$k257pk@fmsmga002.fm.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============2106135615== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Wed, 30 Mar 2011 17:59:51 +0100, Chris Wilson = wrote: > I'm not even sure we need the first posting read. Maybe it should be a > wait_for(I915_READ(GMBUS1 + reg_offset) & GMBUS_SW_CLR_INT, 100) > to be clearer that we are simply giving the hardware the chance to assert > the bit and reset before re-enabling. Doesn't look like the hardware actually delays in setting this bit, so your original sequence should be correct. Of course, a comment indicating that you're toggling the SW_CLR_INT bit to reset the bus might be nice. > No, GMBUS0 is not read until the very first phase of the data cycle. And > the very first thing we do in the next xfer is a write to GMBUS0 of the > port settings. I just thought that explicitly marking the GMBUS controller > as disabled when not in use by us would lead to less confusion in > future. Sounds reasonable. I'd love to have seen a comment in the code and in the patch... =2D-=20 keith.packard@intel.com --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iD8DBQFNk2boQp8BWwlsTdMRAozHAJ44F00IRgaKJb10lNOaNB5m0Bh5MgCgodtf VeoJKsDatSgmtbffTSRX0tc= =CHHv -----END PGP SIGNATURE----- --=-=-=-- --===============2106135615== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============2106135615==--