From: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
To: Mark Brown <broonie@opensource.wolfsonmicro.com>, lrg@ti.com
Cc: alsa-devel@alsa-project.org, patches@opensource.wolfsonmicro.com,
lrg@slimlogic.co.uk
Subject: [PATCH] ASoC: soc-cache: Allow codec->cache_bypass to be used with snd_soc_hw_bulk_write_raw()
Date: Thu, 5 May 2011 14:18:11 +0100 [thread overview]
Message-ID: <1304601491-22751-1-git-send-email-dp@opensource.wolfsonmicro.com> (raw)
If we specifically want to write a block of data to the hw bypassing the
cache, then allow this to happen inside snd_soc_hw_bulk_write_raw().
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
---
sound/soc/soc-cache.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c
index a217db2..687beec 100644
--- a/sound/soc/soc-cache.c
+++ b/sound/soc/soc-cache.c
@@ -404,12 +404,13 @@ static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int r
{
int ret;
- /* Ensure that the base register is volatile. Subsequently
- * any other register that is touched by this routine should be
- * volatile as well to ensure that we don't get out of sync with
- * the cache.
+ /* To ensure that we don't get out of sync with the cache, check
+ * whether the base register is volatile or if we've directly asked
+ * to bypass the cache. Out of bounds registers are considered
+ * volatile.
*/
- if (!snd_soc_codec_volatile_register(codec, reg)
+ if (!codec->cache_bypass
+ && !snd_soc_codec_volatile_register(codec, reg)
&& reg < codec->driver->reg_cache_size)
return -EINVAL;
--
1.7.5
next reply other threads:[~2011-05-05 13:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-05 13:18 Dimitris Papastamos [this message]
2011-05-07 17:43 ` [PATCH] ASoC: soc-cache: Allow codec->cache_bypass to be used with snd_soc_hw_bulk_write_raw() Liam Girdwood
2011-05-08 13:38 ` Mark Brown
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