From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomasz Figa Subject: [PATCH 07/18] dmaengine: PL08x: Fix reading the byte count in cctl Date: Sun, 11 Aug 2013 19:59:19 +0200 Message-ID: <1376243970-6489-8-git-send-email-tomasz.figa@gmail.com> References: <1376243970-6489-1-git-send-email-tomasz.figa@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1376243970-6489-1-git-send-email-tomasz.figa@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux-samsung-soc@vger.kernel.org Cc: alsa-devel@alsa-project.org, Kukjin Kim , Mike Turquette , Tomasz Figa , Liam Girdwood , Sangbeom Kim , Vinod Koul , Linus Walleij , Padmavathi Venna , linux-kernel@vger.kernel.org, Jaroslav Kysela , Takashi Iwai , Mark Brown , Dan Williams , Russell King , linux-spi@vger.kernel.org, Alban Bedel , linux-arm-kernel@lists.infradead.org List-Id: alsa-devel@alsa-project.org From: Alban Bedel There are more fields than just SWIDTH in CH_CONTROL register, so read register value must be masked in addition to shifting. Signed-off-by: Alban Bedel Signed-off-by: Tomasz Figa Reviewed-by: Linus Walleij --- drivers/dma/amba-pl08x.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 4e4c3df..6b9cba2 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -480,6 +480,8 @@ static inline u32 get_bytes_in_cctl(u32 cctl) /* The source width defines the number of bytes */ u32 bytes = cctl & PL080_CONTROL_TRANSFER_SIZE_MASK; + cctl &= PL080_CONTROL_SWIDTH_MASK; + switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { case PL080_WIDTH_8BIT: break; @@ -498,6 +500,8 @@ static inline u32 get_bytes_in_cctl_pl080s(u32 cctl, u32 cctl1) /* The source width defines the number of bytes */ u32 bytes = cctl1 & PL080S_CONTROL_TRANSFER_SIZE_MASK; + cctl &= PL080_CONTROL_SWIDTH_MASK; + switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { case PL080_WIDTH_8BIT: break; -- 1.8.3.2