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* [PATCH v2 0/8] ASoC: Intel: refactor common SST IPC handling
@ 2015-05-19  9:30 Vinod Koul
  2015-05-19  9:30 ` [PATCH v2 1/8] ASoC: Intel: Create an ops to check for DSP busy Vinod Koul
                   ` (8 more replies)
  0 siblings, 9 replies; 13+ messages in thread
From: Vinod Koul @ 2015-05-19  9:30 UTC (permalink / raw)
  To: alsa-devel; +Cc: liam.r.girdwood, tiwai, broonie, Vinod Koul, patches.audio

This series refactors the common SST IPC code to remove some hardcoded
assumption which are no longer valid for future platforms like Skylake,
These are made configurable and right configuration applied for respective
drivers. The changes are mailbox sizes and dsp busy checks.

changes in v2:
 - fix the mem allocation for IPC mailbox

Subhransu S. Prusty (8):
  ASoC: Intel: Create an ops to check for DSP busy
  ASoC: Intel: Move the busy check to ops for Baytrail
  ASoC: Intel: Move the busy check to ops for HSW
  ASoC: Intel: Remove the direct register reference from common ipc
  ASoC: Intel: Allow to configure max size for mailbox data
  ASoC: Intel: Initialize max mailbox size for baytrail
  ASoC: Intel: Initialize max mailbox size for haswell
  ASoC: Intel: Allocate for the mailbox with max size

 sound/soc/intel/baytrail/sst-baytrail-ipc.c | 11 ++++++++++
 sound/soc/intel/common/sst-ipc.c            | 34 +++++++++++++++++++++++++----
 sound/soc/intel/common/sst-ipc.h            |  7 ++++--
 sound/soc/intel/haswell/sst-haswell-ipc.c   | 12 ++++++++++
 4 files changed, 58 insertions(+), 6 deletions(-)

-- 
1.9.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2015-05-22 18:23 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-05-19  9:30 [PATCH v2 0/8] ASoC: Intel: refactor common SST IPC handling Vinod Koul
2015-05-19  9:30 ` [PATCH v2 1/8] ASoC: Intel: Create an ops to check for DSP busy Vinod Koul
2015-05-19  9:30 ` [PATCH v2 2/8] ASoC: Intel: Move the busy check to ops for Baytrail Vinod Koul
2015-05-19  9:30 ` [PATCH v2 3/8] ASoC: Intel: Move the busy check to ops for HSW Vinod Koul
2015-05-19  9:30 ` [PATCH v2 4/8] ASoC: Intel: Remove the direct register reference from common ipc Vinod Koul
2015-05-19  9:30 ` [PATCH v2 5/8] ASoC: Intel: Allow to configure max size for mailbox data Vinod Koul
2015-05-19  9:30 ` [PATCH v2 6/8] ASoC: Intel: Initialize max mailbox size for baytrail Vinod Koul
2015-05-19  9:30 ` [PATCH v2 7/8] ASoC: Intel: Initialize max mailbox size for haswell Vinod Koul
2015-05-22 18:23   ` Mark Brown
2015-05-19  9:30 ` [PATCH v2 8/8] ASoC: Intel: Allocate for the mailbox with max size Vinod Koul
2015-05-19 10:42   ` Takashi Iwai
2015-05-19 11:07     ` Vinod Koul
2015-05-21 21:14 ` [PATCH v2 0/8] ASoC: Intel: refactor common SST IPC handling Liam Girdwood

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