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From: Caesar Wang <wxt@rock-chips.com>
To: Heiko Stuebner <heiko@sntech.de>, Mark Brown <broonie@kernel.org>
Cc: linux-rockchip@lists.infradead.org,
	Caesar Wang <wxt@rock-chips.com>,
	Jaroslav Kysela <perex@perex.cz>,
	alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	Takashi Iwai <tiwai@suse.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ASoC: rockchip-max98090: add the divider the clock for cpu
Date: Mon,  2 Nov 2015 11:14:01 +0800	[thread overview]
Message-ID: <1446434042-2139-2-git-send-email-wxt@rock-chips.com> (raw)
In-Reply-To: <1446434042-2139-1-git-send-email-wxt@rock-chips.com>

Add to set the cpu/codec DAI configure, let's divider the
Transmit/Receive clock for cpu.

In master mode, The SCLK and LRCK are configured as output,
this patch should can set each divider to arrange the clock distribution.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 sound/soc/rockchip/rockchip_max98090.c | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/sound/soc/rockchip/rockchip_max98090.c b/sound/soc/rockchip/rockchip_max98090.c
index 26567b1..8547155 100644
--- a/sound/soc/rockchip/rockchip_max98090.c
+++ b/sound/soc/rockchip/rockchip_max98090.c
@@ -75,8 +75,25 @@ static int rk_aif1_hw_params(struct snd_pcm_substream *substream,
 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
+	int dai_fmt = rtd->card->dai_link->dai_fmt;
 	int mclk;
 
+	/* set codec DAI configuration */
+	ret = snd_soc_dai_set_fmt(codec_dai, dai_fmt);
+	if (ret < 0) {
+		dev_err(codec_dai->dev,
+			"failed to set the format for codec side\n");
+		return ret;
+	}
+
+	/* set cpu DAI configuration */
+	ret = snd_soc_dai_set_fmt(cpu_dai, dai_fmt);
+	if (ret < 0) {
+		dev_err(codec_dai->dev,
+			"failed to set the format for cpu side\n");
+		return ret;
+	}
+
 	switch (params_rate(params)) {
 	case 8000:
 	case 16000:
@@ -105,6 +122,21 @@ static int rk_aif1_hw_params(struct snd_pcm_substream *substream,
 		return ret;
 	}
 
+	/* The codec is master mode, that's not needed set clkdiv for cpu */
+	if ((dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
+		return ret;
+
+	/* the LRCK clock for cpu */
+	ret = snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK,
+				     (mclk / 4) / params_rate(params));
+	if (ret < 0)
+		return ret;
+
+	/* the SCLK clock for cpu */
+	snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 4);
+	if (ret < 0)
+		return ret;
+
 	return ret;
 }
 
-- 
1.9.1

  reply	other threads:[~2015-11-02  3:14 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-02  3:14 [PATCH 1/3] ASoC: rockchip: i2s: Add set the divider clock API Caesar Wang
2015-11-02  3:14 ` Caesar Wang [this message]
2015-11-02  3:14 ` [PATCH 3/3] ASoC: rockchip-rt5645: add the divider the clock for cpu Caesar Wang
2015-11-04 13:54 ` [PATCH 1/3] ASoC: rockchip: i2s: Add set the divider clock API Mark Brown

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