[PATCH V3 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

[PATCH V3 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

[han.lu]

From: "Lu, Han" <han.lu@intel.com>

For SKL we added a commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup
override enabled/disable callback"), in order to enable codec wakeup
override signal, to allow re-enumeration of the controller on SKL after
resume from low power state.
In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power
wells, so it's necessary to reset display audio codecs when power well on,
otherwise display audio codecs will disappear when resume from low power
state.
Reset steps when power on:
    enable codec wakeup -> azx_init_chip() -> disable codec wakeup
The work around is applicable for chips with power well design similar to
SKL, like BXT.

v2: add explanation

v3: use gen check instead of list all available chips

Signed-off-by: Lu, Han <han.lu@intel.com>

diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
index 63d4706..4c01018 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -591,7 +591,12 @@ static void i915_audio_component_codec_wake_override(struct device *dev,
 	struct drm_i915_private *dev_priv = dev_to_i915(dev);
 	u32 tmp;
 
-	if (!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv))
+	/*
+	 * The patch is only applicable to chips that HDMI/DP codecs and PCH
+	 * HD Audio Controller are in different power wells, such as SKL,
+	 * BXT and KBL.
+	 */
+	if (INTEL_INFO(dev_priv)->gen < 9)
 		return;
 
 	/*
-- 
2.5.0

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