From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
To: broonie@kernel.org
Cc: brian.austin@cirrus.com, alsa-devel@alsa-project.org,
lgirdwood@gmail.com, Paul.Handrigan@cirrus.com,
patches@opensource.wolfsonmicro.com
Subject: [PATCH 6/6] ASoC: cs53l30: Mark chip ID registers as volatile
Date: Mon, 24 Oct 2016 10:55:49 +0100 [thread overview]
Message-ID: <1477302949-28049-6-git-send-email-ckeepax@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <1477302949-28049-1-git-send-email-ckeepax@opensource.wolfsonmicro.com>
Mark the chip ID registers as volatile, the current code does work as
without a default value regmap will read from the hardware the first
time, however, this makes it more explicit that this register should be
read from the hardware.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
sound/soc/codecs/cs53l30.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/cs53l30.c b/sound/soc/codecs/cs53l30.c
index cb47fb5..b4f0a43 100644
--- a/sound/soc/codecs/cs53l30.c
+++ b/sound/soc/codecs/cs53l30.c
@@ -89,10 +89,16 @@ static const struct reg_default cs53l30_reg_defaults[] = {
static bool cs53l30_volatile_register(struct device *dev, unsigned int reg)
{
- if (reg == CS53L30_IS)
+ switch (reg) {
+ case CS53L30_DEVID_AB:
+ case CS53L30_DEVID_CD:
+ case CS53L30_DEVID_E:
+ case CS53L30_REVID:
+ case CS53L30_IS:
return true;
- else
+ default:
return false;
+ }
}
static bool cs53l30_writeable_register(struct device *dev, unsigned int reg)
--
2.1.4
next prev parent reply other threads:[~2016-10-24 9:55 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-24 9:55 [PATCH 1/6] ASoC: cs42xx8: Mark chip ID as volatile and remove cache bypass Charles Keepax
2016-10-24 9:55 ` [PATCH 2/6] ASoC: cs42l73: Make ID registers " Charles Keepax
2016-10-24 9:55 ` [PATCH 3/6] ASoC: cs42l56: " Charles Keepax
2016-10-24 9:55 ` [PATCH 4/6] ASoC: cs4265: Mark chip ID register as volatile Charles Keepax
2016-10-24 9:55 ` [PATCH 5/6] ASoC: cs42l52: " Charles Keepax
2016-10-24 9:55 ` Charles Keepax [this message]
2016-10-24 12:55 ` [PATCH 1/6] ASoC: cs42xx8: Mark chip ID as volatile and remove cache bypass Brian Austin
2016-10-24 15:33 ` Mark Brown
2016-10-25 15:16 ` Charles Keepax
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