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From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw@public.gmane.org,
	airlied-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	Vijendar.Mukunda-5C7GfCeVMHo@public.gmane.org,
	rajeevkumar.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	perex-/Fr2/VpizcU@public.gmane.org
Cc: tiwai-l3A5Bk7waGM@public.gmane.org,
	Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	Akshu Agrawal <akshu.agrawal-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 4/9] drm/amdgpu Moving amdgpu asic types to a separate file
Date: Fri, 28 Jul 2017 15:31:29 -0400	[thread overview]
Message-ID: <1501270294-31153-5-git-send-email-alexander.deucher@amd.com> (raw)
In-Reply-To: <1501270294-31153-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>

From: Akshu Agrawal <akshu.agrawal@amd.com>

Amdgpu asic types will be required for other drivers too.
Hence, its better to keep it in a separate include file.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

New patch to share asic_type definitions between GPU and audio driver.

drivers/gpu/drm/amd/include/amd_shared.h | 29 ++----------------
 include/drm/amd_asic_type.h              | 52 ++++++++++++++++++++++++++++++++
 2 files changed, 54 insertions(+), 27 deletions(-)
 create mode 100644 include/drm/amd_asic_type.h

diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
index 70e8c20..3a49fbd 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -23,34 +23,9 @@
 #ifndef __AMD_SHARED_H__
 #define __AMD_SHARED_H__
 
-#define AMD_MAX_USEC_TIMEOUT		200000  /* 200 ms */
+#include <drm/amd_asic_type.h>
 
-/*
- * Supported ASIC types
- */
-enum amd_asic_type {
-	CHIP_TAHITI = 0,
-	CHIP_PITCAIRN,
-	CHIP_VERDE,
-	CHIP_OLAND,
-	CHIP_HAINAN,
-	CHIP_BONAIRE,
-	CHIP_KAVERI,
-	CHIP_KABINI,
-	CHIP_HAWAII,
-	CHIP_MULLINS,
-	CHIP_TOPAZ,
-	CHIP_TONGA,
-	CHIP_FIJI,
-	CHIP_CARRIZO,
-	CHIP_STONEY,
-	CHIP_POLARIS10,
-	CHIP_POLARIS11,
-	CHIP_POLARIS12,
-	CHIP_VEGA10,
-	CHIP_RAVEN,
-	CHIP_LAST,
-};
+#define AMD_MAX_USEC_TIMEOUT		200000  /* 200 ms */
 
 /*
  * Chip flags
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
new file mode 100644
index 0000000..599028f
--- /dev/null
+++ b/include/drm/amd_asic_type.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __AMD_ASIC_TYPE_H__
+#define __AMD_ASIC_TYPE_H__
+/*
+ * Supported ASIC types
+ */
+enum amd_asic_type {
+	CHIP_TAHITI = 0,
+	CHIP_PITCAIRN,
+	CHIP_VERDE,
+	CHIP_OLAND,
+	CHIP_HAINAN,
+	CHIP_BONAIRE,
+	CHIP_KAVERI,
+	CHIP_KABINI,
+	CHIP_HAWAII,
+	CHIP_MULLINS,
+	CHIP_TOPAZ,
+	CHIP_TONGA,
+	CHIP_FIJI,
+	CHIP_CARRIZO,
+	CHIP_STONEY,
+	CHIP_POLARIS10,
+	CHIP_POLARIS11,
+	CHIP_POLARIS12,
+	CHIP_VEGA10,
+	CHIP_RAVEN,
+	CHIP_LAST,
+};
+
+#endif /*__AMD_ASIC_TYPE_H__ */
-- 
2.5.5

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  parent reply	other threads:[~2017-07-28 19:31 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-28 19:31 [PATCH 0/9 v2] Add ASoC support for AMD Stoney APUs Alex Deucher
     [not found] ` <1501270294-31153-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-07-28 19:31   ` [PATCH 1/9] ASoC: dwc: Added a quirk DW_I2S_QUIRK_16BIT_IDX_OVERRIDE to dwc driver Alex Deucher
2017-08-01 13:12     ` Mark Brown
2017-07-28 19:31   ` [PATCH 2/9 v2] drm/amd/amdgpu: Added asic_type as ACP DMA driver platform data Alex Deucher
     [not found]     ` <1501270294-31153-3-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-08-14 19:21       ` Alex Deucher
2017-07-28 19:31   ` [PATCH 3/9 v2] drm/amd/amdgpu: Added a quirk for Stoney platform Alex Deucher
2017-07-28 19:31   ` Alex Deucher [this message]
2017-10-18  0:09     ` Applied "drm/amdgpu Moving amdgpu asic types to a separate file" to the asoc tree Mark Brown
2017-07-28 19:31   ` [PATCH 6/9 v2] ASoC: AMD: DMA driver changes for Stoney Platform Alex Deucher
2017-10-18  0:09     ` Applied "ASoC: AMD: DMA driver changes for Stoney Platform" to the asoc tree Mark Brown
2017-07-28 19:31   ` [PATCH 7/9 v2] ASoC: AMD: Audio buffer related changes for Stoney Alex Deucher
2017-07-28 19:31   ` [PATCH 8/9 v2] drm/amd/amdgpu: Disabling Power Gating for Stoney platform Alex Deucher
2017-07-28 19:31   ` [PATCH 9/9 v2] ASoC: AMD: Add machine driver for cz rt5650 Alex Deucher
2017-07-28 19:31 ` [PATCH 5/9 v2] ASoC: AMD: disabling memory gating in stoney platform Alex Deucher
2017-10-18  0:09   ` Applied "ASoC: AMD: disabling memory gating in stoney platform" to the asoc tree Mark Brown

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