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Mon, 25 Oct 2021 11:06:40 +0000 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 25 Oct 2021 04:06:38 -0700 Received: from audio.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 25 Oct 2021 04:06:36 -0700 From: Sameer Pujar To: , , , Subject: [PATCH] ASoC: tegra: Add master volume/mute control support Date: Mon, 25 Oct 2021 16:36:16 +0530 Message-ID: <1635159976-17355-1-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 19d1ac5f-a7ac-4510-9de2-08d997a785a4 X-MS-TrafficTypeDiagnostic: BN6PR12MB1378: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: xKaCWOOYmVgdw55pPNYJpXGyirlsc3xRAAb1Ld1trMxDzOBNX2+mM4T3nLQLqsxzOBBf1zkEpl1KMRYd5oB2TyH9IIfEgjrD400ytlvG7EzaSUoQvdMDUHYw6MyTpDKnkwzuP2kvAXJaxrtFL+UwPdffY5yV1sqbfdIL/lS8tPdVEucCkxVa3FA5w7Dgnd6CgXb46L0JFAzj5hH6zF/l/v9JfuAHzf0hFInnkOYEwqgi3b9QE11Q4W8GpMPC+05OBmklz9VkwXGcFGx9XjjXxDNeQc/pcAy/qnHoyw6wYQFBCeBPIebdHpEbJ4RoXm7uL2rLU0yLhm9IZSLNdh+DhclOPGGNGBlB5RWghunO25HHkR4dGmCwo2jLJdTxnlM6Rptd4ZplRETQlhSudRofG1Ukdr/a6ymwkPDovNerPfLth+E5uib3PJLa2jrutA2/m0+NnB87UevLIhSaQbhhZZlSoYNB6L0aflP9FRJ+88BovtXRi5/NoWvDwDNXz3yjcHkmfS6GqNGa+rftuwYPOTna9OTPoBhRv9J6qxaPLq4DDIlPuY00yhoWKI6gwTrlgZ8TwPmZz0Uy4JY7bMIBYzHLcJMHi695vfkLbZIwWa9kdtIGeXfH/YlNRSnOYlWLiEQY87VJAXXJoN/AhUhCxeqK6HPPq5CI9S/cSZjOkTdadolN/db9xmUduAWsooQieoOufn33S7kgKVwLIhh7Wg== X-Forefront-Antispam-Report: CIP:216.228.112.32; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid01.nvidia.com; CAT:NONE; SFS:(4636009)(46966006)(36840700001)(54906003)(110136005)(83380400001)(107886003)(2906002)(186003)(26005)(82310400003)(70586007)(5660300002)(356005)(8676002)(7636003)(2616005)(36860700001)(8936002)(70206006)(4326008)(86362001)(316002)(47076005)(36756003)(7696005)(6666004)(508600001)(426003)(336012); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2021 11:06:40.6037 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 19d1ac5f-a7ac-4510-9de2-08d997a785a4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1378 Cc: alsa-devel@alsa-project.org, Sameer Pujar , linux-kernel@vger.kernel.org, jonathanh@nvidia.com, thierry.reding@gmail.com, linux-tegra@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" The MVC module has a per channel control bit, based on which it decides to apply channel specific volume/mute settings. When per channel control bit is enabled (which is the default HW configuration), all MVC channel volume/mute can be independently controlled. If the control is disabled, channel-0 volume/mute setting is applied by HW to all remaining channels. Thus add support to leverage this HW feature by exposing master controls for volume/mute. With this, now there are per channel and master volume/mute controls. Users need to just use controls which are suitable for their applications. The per channel control enable/disable is mananged in driver and hidden from users, so that they need to just worry about respective volume/mute controls. Signed-off-by: Sameer Pujar --- sound/soc/tegra/tegra210_mvc.c | 95 +++++++++++++++++++++++++++++++++++++----- sound/soc/tegra/tegra210_mvc.h | 2 + 2 files changed, 87 insertions(+), 10 deletions(-) diff --git a/sound/soc/tegra/tegra210_mvc.c b/sound/soc/tegra/tegra210_mvc.c index 7b9c700..40cd21a 100644 --- a/sound/soc/tegra/tegra210_mvc.c +++ b/sound/soc/tegra/tegra210_mvc.c @@ -123,7 +123,42 @@ static int tegra210_mvc_get_mute(struct snd_kcontrol *kcontrol, mute_mask = (val >> TEGRA210_MVC_MUTE_SHIFT) & TEGRA210_MUTE_MASK_EN; - ucontrol->value.integer.value[0] = mute_mask; + if (strstr(kcontrol->id.name, "Per Chan Mute Mask")) { + /* + * If per channel control is enabled, then return + * exact mute/unmute setting of all channels. + * + * Else report setting based on CH0 bit to reflect + * the correct HW state. + */ + if (val & TEGRA210_MVC_PER_CHAN_CTRL_EN) { + ucontrol->value.integer.value[0] = mute_mask; + } else { + if (mute_mask & TEGRA210_MVC_CH0_MUTE_EN) + ucontrol->value.integer.value[0] = + TEGRA210_MUTE_MASK_EN; + else + ucontrol->value.integer.value[0] = 0; + } + } else { + /* + * If per channel control is disabled, then return + * master mute/unmute setting based on CH0 bit. + * + * Else report settings based on state of all + * channels. + */ + if (!(val & TEGRA210_MVC_PER_CHAN_CTRL_EN)) { + ucontrol->value.integer.value[0] = + mute_mask & TEGRA210_MVC_CH0_MUTE_EN; + } else { + if (mute_mask == TEGRA210_MUTE_MASK_EN) + ucontrol->value.integer.value[0] = + TEGRA210_MVC_CH0_MUTE_EN; + else + ucontrol->value.integer.value[0] = 0; + } + } return 0; } @@ -136,6 +171,7 @@ static int tegra210_mvc_put_mute(struct snd_kcontrol *kcontrol, struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); struct tegra210_mvc *mvc = snd_soc_component_get_drvdata(cmpnt); unsigned int value; + u32 reg_mask; u8 mute_mask; int err; @@ -150,11 +186,22 @@ static int tegra210_mvc_put_mute(struct snd_kcontrol *kcontrol, mute_mask = ucontrol->value.integer.value[0]; - err = regmap_update_bits(mvc->regmap, mc->reg, - TEGRA210_MVC_MUTE_MASK, - mute_mask << TEGRA210_MVC_MUTE_SHIFT); - if (err < 0) - goto end; + if (strstr(kcontrol->id.name, "Per Chan Mute Mask")) { + regmap_update_bits(mvc->regmap, TEGRA210_MVC_CTRL, + TEGRA210_MVC_PER_CHAN_CTRL_EN_MASK, + TEGRA210_MVC_PER_CHAN_CTRL_EN); + + reg_mask = TEGRA210_MVC_MUTE_MASK; + } else { + regmap_update_bits(mvc->regmap, TEGRA210_MVC_CTRL, + TEGRA210_MVC_PER_CHAN_CTRL_EN_MASK, + 0); + + reg_mask = TEGRA210_MVC_CH0_MUTE_MASK; + } + + regmap_update_bits(mvc->regmap, mc->reg, reg_mask, + mute_mask << TEGRA210_MVC_MUTE_SHIFT); return 1; @@ -212,11 +259,31 @@ static int tegra210_mvc_put_vol(struct snd_kcontrol *kcontrol, ucontrol->value.integer.value[0]); /* Configure init volume same as target volume */ - regmap_write(mvc->regmap, - TEGRA210_MVC_REG_OFFSET(TEGRA210_MVC_INIT_VOL, chan), - mvc->volume[chan]); + if (strstr(kcontrol->id.name, "Channel")) { + regmap_update_bits(mvc->regmap, TEGRA210_MVC_CTRL, + TEGRA210_MVC_PER_CHAN_CTRL_EN_MASK, + TEGRA210_MVC_PER_CHAN_CTRL_EN); + + regmap_write(mvc->regmap, + TEGRA210_MVC_REG_OFFSET(TEGRA210_MVC_INIT_VOL, chan), + mvc->volume[chan]); + + regmap_write(mvc->regmap, reg, mvc->volume[chan]); + } else { + int i; + + regmap_update_bits(mvc->regmap, TEGRA210_MVC_CTRL, + TEGRA210_MVC_PER_CHAN_CTRL_EN_MASK, + 0); + + for (i = 1; i < TEGRA210_MVC_MAX_CHAN_COUNT; i++) + mvc->volume[i] = mvc->volume[0]; - regmap_write(mvc->regmap, reg, mvc->volume[chan]); + regmap_write(mvc->regmap, TEGRA210_MVC_INIT_VOL, + mvc->volume[0]); + + regmap_write(mvc->regmap, reg, mvc->volume[0]); + } regmap_update_bits(mvc->regmap, TEGRA210_MVC_SWITCH, TEGRA210_MVC_VOLUME_SWITCH_MASK, @@ -422,6 +489,14 @@ static const struct snd_kcontrol_new tegra210_mvc_vol_ctrl[] = { TEGRA210_MVC_CTRL, 0, TEGRA210_MUTE_MASK_EN, 0, tegra210_mvc_get_mute, tegra210_mvc_put_mute), + /* Master volume */ + SOC_SINGLE_EXT("Volume", TEGRA210_MVC_TARGET_VOL, 0, 16000, 0, + tegra210_mvc_get_vol, tegra210_mvc_put_vol), + + /* Master mute */ + SOC_SINGLE_EXT("Mute", TEGRA210_MVC_CTRL, 0, 1, 0, + tegra210_mvc_get_mute, tegra210_mvc_put_mute), + SOC_ENUM_EXT("Curve Type", tegra210_mvc_curve_type_ctrl, tegra210_mvc_get_curve_type, tegra210_mvc_put_curve_type), }; diff --git a/sound/soc/tegra/tegra210_mvc.h b/sound/soc/tegra/tegra210_mvc.h index def29c4..7f2567e 100644 --- a/sound/soc/tegra/tegra210_mvc.h +++ b/sound/soc/tegra/tegra210_mvc.h @@ -59,6 +59,8 @@ #define TEGRA210_MUTE_MASK_EN 0xff #define TEGRA210_MVC_MUTE_MASK (TEGRA210_MUTE_MASK_EN << TEGRA210_MVC_MUTE_SHIFT) #define TEGRA210_MVC_MUTE_EN (TEGRA210_MUTE_MASK_EN << TEGRA210_MVC_MUTE_SHIFT) +#define TEGRA210_MVC_CH0_MUTE_EN 1 +#define TEGRA210_MVC_CH0_MUTE_MASK (TEGRA210_MVC_CH0_MUTE_EN << TEGRA210_MVC_MUTE_SHIFT) #define TEGRA210_MVC_PER_CHAN_CTRL_EN_SHIFT 30 #define TEGRA210_MVC_PER_CHAN_CTRL_EN_MASK (1 << TEGRA210_MVC_PER_CHAN_CTRL_EN_SHIFT) -- 2.7.4