From: cy_huang <u0084500@gmail.com>
To: broonie@kernel.org, perex@perex.cz, tiwai@suse.com
Cc: oder_chiou@realtek.com, alsa-devel@alsa-project.org,
ritchie_hsieh@richtek.com, lgirdwood@gmail.com,
linux-kernel@vger.kernel.org,
ChiYuan Huang <cy_huang@richtek.com>,
allen_lin@richtek.com
Subject: [PATCH 1/2] ASoC: rt9120: Fix 3byte read, valule offset typo
Date: Thu, 19 May 2022 10:13:37 +0800 [thread overview]
Message-ID: <1652926418-8519-2-git-send-email-u0084500@gmail.com> (raw)
In-Reply-To: <1652926418-8519-1-git-send-email-u0084500@gmail.com>
From: ChiYuan Huang <cy_huang@richtek.com>
For RG 3byte read, the value order is offset [0], [1], and [2].
Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
---
sound/soc/codecs/rt9120.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/rt9120.c b/sound/soc/codecs/rt9120.c
index cdf8ad2..94d42be 100644
--- a/sound/soc/codecs/rt9120.c
+++ b/sound/soc/codecs/rt9120.c
@@ -372,7 +372,7 @@ static int rt9120_reg_read(void *context, unsigned int reg, unsigned int *val)
*val = be32_to_cpup((__be32 *)raw);
break;
case 3:
- *val = raw[0] << 16 | raw[1] << 8 | raw[0];
+ *val = raw[0] << 16 | raw[1] << 8 | raw[2];
break;
case 2:
*val = be16_to_cpup((__be16 *)raw);
--
2.7.4
next prev parent reply other threads:[~2022-05-19 2:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-19 2:13 [PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control cy_huang
2022-05-19 2:13 ` cy_huang [this message]
2022-05-19 2:13 ` [PATCH 2/2] ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic cy_huang
2022-05-20 11:18 ` [PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control Mark Brown
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