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[93.181.165.181]) by smtp.gmail.com with ESMTPSA id e14-20020a19500e000000b0044a16931c7csm1912219lfb.97.2022.04.06.11.48.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Apr 2022 11:48:16 -0700 (PDT) From: Janusz Krzysztofik To: Aaro Koskinen Subject: Re: [PATCH v2] ARM: OMAP1: Prepare for conversion of OMAP1 clocks to CCF Date: Wed, 06 Apr 2022 20:48:14 +0200 Message-ID: <1888452.PYKUYFuaPT@dell> In-Reply-To: <20220406132149.GC594699@darkstar.musicnaut.iki.fi> References: <20220310233307.99220-3-jmkrzyszt@gmail.com> <1810824.tdWV9SEqCh@dell> <20220406132149.GC594699@darkstar.musicnaut.iki.fi> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Cc: alsa-devel@alsa-project.org, Felipe Balbi , Paul Walmsley , Arnd Bergmann , Liam Girdwood , Tony Lindgren , Greg Kroah-Hartman , Helge Deller , linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown , Alan Stern , Ulf Hansson , linux-omap@vger.kernel.org, Peter Ujfalusi , linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Dnia =C5=9Broda, 6 kwietnia 2022 15:21:49 CEST Aaro Koskinen pisze: > Hi, >=20 > On Sat, Mar 26, 2022 at 10:17:49PM +0100, Janusz Krzysztofik wrote: > > Dnia wtorek, 22 marca 2022 20:07:53 CET Aaro Koskinen pisze: > > > On Tue, Mar 22, 2022 at 06:36:48PM +0200, Aaro Koskinen wrote: > > > > Something is still broken. When doing kexec (using CCF kernel), the > > > > kexec'ed kernel now hangs early (on 770): > > > [...] > > > > [ 0.928863] calling omap1_init_devices+0x0/0x2c @ 1 > > >=20 > > > It hangs in omap_sram_reprogram_clock() (<- omap1_select_table_rate() > > > <- omap1_clk_late_init()). > >=20 > > I've reviewed my changes but haven't found anything suspicious. >=20 > The below change is fixing the kexec boot. Based on the comment in the > code, it seems this clock is needed for the SRAM to work. >=20 > diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock= _data.c > index e33e11f826af..b8b4876ff935 100644 > --- a/arch/arm/mach-omap1/clock_data.c > +++ b/arch/arm/mach-omap1/clock_data.c > @@ -285,7 +285,7 @@ static struct omap1_clk tc1_ck =3D { > */ > =20 > static struct omap1_clk tc2_ck =3D { > - .hw.init =3D CLK_HW_INIT("tc2_ck", "tc_ck", &omap1_clk_gate_ops, 0), > + .hw.init =3D CLK_HW_INIT("tc2_ck", "tc_ck", &omap1_clk_gate_ops, CLK_IS= _CRITICAL), > .ops =3D &clkops_generic, > .enable_reg =3D OMAP1_IO_ADDRESS(ARM_IDLECT3), > .enable_bit =3D EN_TC2_CK, >=20 > A. >=20 Thank you Aaro. Will you submit this as a separate fix, or should I submit= =20 v2 of my patch 4/4 with your fix included? Thanks, Janusz