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From: Daniel Mack <daniel@caiaq.org>
To: alsa-devel@alsa-project.org
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: [PATCH] asoc tlv320aic3x: set power bits correctly
Date: Wed, 30 Apr 2008 11:37:19 +0200	[thread overview]
Message-ID: <20080430093719.GA13740@buzzloop.caiaq.de> (raw)

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Set power bits in output stage control registers to reflect the "!muted"
bits. The codec needs them set in order to operate correctly.

Signed-off-by: Daniel Mack <daniel@caiaq.de>



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From: Daniel Mack <daniel@caiaq.de>

Set power bits in output stage control registers to reflect the "!muted"
bits. The codec needs them set in order to operate correctly.

Signed-off-by: Daniel Mack <daniel@caiaq.de>

diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index 6e4bc69..c4c50b7 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -93,6 +93,28 @@ static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = {
 };
 
 /*
+ * power up/down aic3x functions
+ */
+static inline void aic3x_handle_pwr_bits(unsigned int reg, unsigned int *val)
+{
+	switch (reg) {
+	case HPLOUT_CTRL:
+	case HPROUT_CTRL:
+	case HPLCOM_CTRL:
+	case HPRCOM_CTRL:
+	case LLOPM_CTRL:
+	case RLOPM_CTRL:
+	case MONOLOPM_CTRL:
+		if (*val & 0x08)
+			*val |= 0x01;
+		else
+			*val &= ~0x01;
+
+		break;
+	}
+}
+
+/*
  * read aic3x register cache
  */
 static inline unsigned int aic3x_read_reg_cache(struct snd_soc_codec *codec,
@@ -124,6 +146,8 @@ static int aic3x_write(struct snd_soc_codec *codec, unsigned int reg,
 {
 	u8 data[2];
 
+	aic3x_handle_pwr_bits(reg, &value);
+
 	/* data is
 	 *   D15..D8 aic3x register offset
 	 *   D7...D0 register data

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             reply	other threads:[~2008-04-30  9:37 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-04-30  9:37 Daniel Mack [this message]
2008-04-30  9:57 ` [PATCH] asoc tlv320aic3x: set power bits correctly Mark Brown
2008-04-30 11:50   ` Jarkko Nikula
2008-04-30 13:11     ` Daniel Mack
2008-04-30 13:41       ` Mark Brown

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