From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: Re: [PATCH v2] ASoC: clean up wm8974 and wm8978 clock
 divider handling
Date: Fri, 29 Jan 2010 14:33:41 +0000
Message-ID: <20100129143340.GA7123@rakim.wolfsonmicro.main>
References: <Pine.LNX.4.64.1001291526000.4613@axis700.grange>
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To: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: alsa-devel@alsa-project.org, Liam Girdwood <lrg@slimlogic.co.uk>
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On Fri, Jan 29, 2010 at 03:31:06PM +0100, Guennadi Liakhovetski wrote:
> wm8974 and wm8978 codec drivers control DAC and ADC oversampling rates in their
> .set_clkdiv() methods, which is wrong, because these are simple boolean
> switches and not clock dividers. Move these bits to sound controls. Also remove
> manual configuration of the MCLK divider in wm8978, since it is configured
> automatically.
> 
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>

Applied, thanks.