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From: Peter Ujfalusi <peter.ujfalusi@nokia.com>
To: alsa-devel@alsa-project.org
Cc: "broonie@opensource.wolfsonmicro.com"
	<broonie@opensource.wolfsonmicro.com>,
	ext Liam Girdwood <lrg@slimlogic.co.uk>
Subject: Re: [PATCH 5/7] ASoC: TWL4030: Helper to check chip default registers
Date: Wed, 26 May 2010 09:00:35 +0300	[thread overview]
Message-ID: <201005260900.35587.peter.ujfalusi@nokia.com> (raw)
In-Reply-To: <1274792996.3000.233.camel@odin>

Hi,

You and Mark has a valid point...

On Tuesday 25 May 2010 16:09:56 ext Liam Girdwood wrote:
> On Tue, 2010-05-25 at 15:20 +0300, Peter Ujfalusi wrote:
> > > Is this purely for information/debug purposes ?
> > 
> > Yes, the driver support twl4030, twl5030, twl5031, tps*something* chips.
> > If someone, who have access to those chips, and in doubt, can check it.
> 
> So it's more a debug aid.

I'll change the dev_info to dev_dbg to reflect that correctly.

> 
> > > Why do we need to check default vales at init(). Is there another
> > > driver changing the audio codec registers ?
> > 
> > This driver is going to change it.
> > It is also possible that the bootloader changed them (startup tone?).
> 
> Yeah, that's what I thought. In the past I've always forced the CODEC
> registers to their default values during probe(). Very handy if the
> driver is a module and you are recovering from a buggy state.

Yeah, during development this is really handy.

> 
> > So it is not really bulletproof, but at least it helped me to find out
> > the the ARXR2_APGA_CTL register does not have the reset value, which it
> > supposed to have.
> > 
> > Well, I can remove it, but I thought that it is a nice touch ;)
> 
> It's nice ;) But maybe we should reset the default values at probe() to
> be sure.

I did run some tests.
The codec registers are in reset state whenever the device boots (either power 
on, or reboot). In our setup the codec is built in the kernel.
I have measured the time needed to execute the twl4030_init_chip with and 
without rewriting the codec registers (71 register writes):
No reset_registers: ~51ms
reset registers:    ~71ms

I need to optimize for module loading time, and ~20ms extra is quite big.

Can we make a compromise?
I propose to have twl4030_setup_data.reset_registers, if it is set by the 
machine driver, than we are going to reset the registers, if it is not set, than 
we skip the restore part (not writing the 71 registers).
So during development, or if one have the codec as module, the machine can set 
this, so the registers will be restored, but if the testing shows that there is 
no need to do that, than we can speed up the module probe.

What do you think?

> 
> Thanks
> 
> Liam
> 

-- 
Péter

  reply	other threads:[~2010-05-26  6:00 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-05-25 11:34 [PATCH 0/7] ASoC: TWL4030: put the codec to off when not active Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 1/7] ASoC: TWL4030: Revisit codec defaults Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 2/7] ASoC: TWL4030: Remove wrapper for power down Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 3/7] ASoC: TWL4030: Make offset cancellation path configurable Peter Ujfalusi
2010-05-25 11:59   ` Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 4/7] ASoC: TWL4030: Optimize the power up sequence Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 5/7] ASoC: TWL4030: Helper to check chip default registers Peter Ujfalusi
2010-05-25 11:57   ` Liam Girdwood
2010-05-25 12:20     ` Peter Ujfalusi
2010-05-25 13:09       ` Liam Girdwood
2010-05-26  6:00         ` Peter Ujfalusi [this message]
2010-05-26  6:28           ` Peter Ujfalusi
2010-05-26  6:35             ` Mark Brown
2010-05-26  7:15               ` Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 6/7] ASoC: TWL4030: Correct the ARXR2_APGA_CTL chip default Peter Ujfalusi
2010-05-25 11:34 ` [PATCH 7/7] ASoC: TWL4030: Use BIAS_OFF instead of BIAS_STANDBY, when not in use Peter Ujfalusi
2010-05-25 17:35 ` [PATCH 0/7] ASoC: TWL4030: put the codec to off when not active Mark Brown

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