* [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition
@ 2011-06-20 7:36 Sangbeom Kim
2011-06-20 7:36 ` [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related " Sangbeom Kim
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Sangbeom Kim @ 2011-06-20 7:36 UTC (permalink / raw)
To: alsa-devel; +Cc: Sangbeom Kim, jassisinghbrar, broonie, lrg
I2S registers can be used for control idma.
Previously, register is defined in i2s.c.
For sharing the registers, It is moved to i2s-regs.h
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
---
sound/soc/samsung/i2s-regs.h | 123 ++++++++++++++++++++++++++++++++++++++++++
sound/soc/samsung/i2s.c | 104 +-----------------------------------
2 files changed, 124 insertions(+), 103 deletions(-)
create mode 100644 sound/soc/samsung/i2s-regs.h
diff --git a/sound/soc/samsung/i2s-regs.h b/sound/soc/samsung/i2s-regs.h
new file mode 100644
index 0000000..1fa0cd1
--- /dev/null
+++ b/sound/soc/samsung/i2s-regs.h
@@ -0,0 +1,123 @@
+/*
+ * linux/sound/soc/samsung/i2s-regs.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung I2S driver's register header
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __SND_SOC_SAMSUNG_I2S_REGS_H
+#define __SND_SOC_SAMSUNG_I2S_REGS_H
+
+#define I2SCON 0x0
+#define I2SMOD 0x4
+#define I2SFIC 0x8
+#define I2SPSR 0xc
+#define I2STXD 0x10
+#define I2SRXD 0x14
+#define I2SFICS 0x18
+#define I2STXDS 0x1c
+
+#define CON_RSTCLR (1 << 31)
+#define CON_FRXOFSTATUS (1 << 26)
+#define CON_FRXORINTEN (1 << 25)
+#define CON_FTXSURSTAT (1 << 24)
+#define CON_FTXSURINTEN (1 << 23)
+#define CON_TXSDMA_PAUSE (1 << 20)
+#define CON_TXSDMA_ACTIVE (1 << 18)
+
+#define CON_FTXURSTATUS (1 << 17)
+#define CON_FTXURINTEN (1 << 16)
+#define CON_TXFIFO2_EMPTY (1 << 15)
+#define CON_TXFIFO1_EMPTY (1 << 14)
+#define CON_TXFIFO2_FULL (1 << 13)
+#define CON_TXFIFO1_FULL (1 << 12)
+
+#define CON_LRINDEX (1 << 11)
+#define CON_TXFIFO_EMPTY (1 << 10)
+#define CON_RXFIFO_EMPTY (1 << 9)
+#define CON_TXFIFO_FULL (1 << 8)
+#define CON_RXFIFO_FULL (1 << 7)
+#define CON_TXDMA_PAUSE (1 << 6)
+#define CON_RXDMA_PAUSE (1 << 5)
+#define CON_TXCH_PAUSE (1 << 4)
+#define CON_RXCH_PAUSE (1 << 3)
+#define CON_TXDMA_ACTIVE (1 << 2)
+#define CON_RXDMA_ACTIVE (1 << 1)
+#define CON_ACTIVE (1 << 0)
+
+#define MOD_OPCLK_CDCLK_OUT (0 << 30)
+#define MOD_OPCLK_CDCLK_IN (1 << 30)
+#define MOD_OPCLK_BCLK_OUT (2 << 30)
+#define MOD_OPCLK_PCLK (3 << 30)
+#define MOD_OPCLK_MASK (3 << 30)
+#define MOD_TXS_IDMA (1 << 28) /* Sec_TXFIFO use I-DMA */
+
+#define MOD_BLCS_SHIFT 26
+#define MOD_BLCS_16BIT (0 << MOD_BLCS_SHIFT)
+#define MOD_BLCS_8BIT (1 << MOD_BLCS_SHIFT)
+#define MOD_BLCS_24BIT (2 << MOD_BLCS_SHIFT)
+#define MOD_BLCS_MASK (3 << MOD_BLCS_SHIFT)
+#define MOD_BLCP_SHIFT 24
+#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
+#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
+#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
+#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
+
+#define MOD_C2DD_HHALF (1 << 21) /* Discard Higher-half */
+#define MOD_C2DD_LHALF (1 << 20) /* Discard Lower-half */
+#define MOD_C1DD_HHALF (1 << 19)
+#define MOD_C1DD_LHALF (1 << 18)
+#define MOD_DC2_EN (1 << 17)
+#define MOD_DC1_EN (1 << 16)
+#define MOD_BLC_16BIT (0 << 13)
+#define MOD_BLC_8BIT (1 << 13)
+#define MOD_BLC_24BIT (2 << 13)
+#define MOD_BLC_MASK (3 << 13)
+
+#define MOD_IMS_SYSMUX (1 << 10)
+#define MOD_SLAVE (1 << 11)
+#define MOD_TXONLY (0 << 8)
+#define MOD_RXONLY (1 << 8)
+#define MOD_TXRX (2 << 8)
+#define MOD_MASK (3 << 8)
+#define MOD_LR_LLOW (0 << 7)
+#define MOD_LR_RLOW (1 << 7)
+#define MOD_SDF_IIS (0 << 5)
+#define MOD_SDF_MSB (1 << 5)
+#define MOD_SDF_LSB (2 << 5)
+#define MOD_SDF_MASK (3 << 5)
+#define MOD_RCLK_256FS (0 << 3)
+#define MOD_RCLK_512FS (1 << 3)
+#define MOD_RCLK_384FS (2 << 3)
+#define MOD_RCLK_768FS (3 << 3)
+#define MOD_RCLK_MASK (3 << 3)
+#define MOD_BCLK_32FS (0 << 1)
+#define MOD_BCLK_48FS (1 << 1)
+#define MOD_BCLK_16FS (2 << 1)
+#define MOD_BCLK_24FS (3 << 1)
+#define MOD_BCLK_MASK (3 << 1)
+#define MOD_8BIT (1 << 0)
+
+#define MOD_CDCLKCON (1 << 12)
+
+#define PSR_PSREN (1 << 15)
+
+#define FIC_TX2COUNT(x) (((x) >> 24) & 0xf)
+#define FIC_TX1COUNT(x) (((x) >> 16) & 0xf)
+
+#define FIC_TXFLUSH (1 << 15)
+#define FIC_RXFLUSH (1 << 7)
+#define FIC_TXCOUNT(x) (((x) >> 8) & 0xf)
+#define FIC_RXCOUNT(x) (((x) >> 0) & 0xf)
+#define FICS_TXCOUNT(x) (((x) >> 8) & 0x7f)
+
+#endif /* __SND_SOC_SAMSUNG_I2S_REGS_H */
+
+
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 992a732..1568eea 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -22,109 +22,7 @@
#include "dma.h"
#include "i2s.h"
-
-#define I2SCON 0x0
-#define I2SMOD 0x4
-#define I2SFIC 0x8
-#define I2SPSR 0xc
-#define I2STXD 0x10
-#define I2SRXD 0x14
-#define I2SFICS 0x18
-#define I2STXDS 0x1c
-
-#define CON_RSTCLR (1 << 31)
-#define CON_FRXOFSTATUS (1 << 26)
-#define CON_FRXORINTEN (1 << 25)
-#define CON_FTXSURSTAT (1 << 24)
-#define CON_FTXSURINTEN (1 << 23)
-#define CON_TXSDMA_PAUSE (1 << 20)
-#define CON_TXSDMA_ACTIVE (1 << 18)
-
-#define CON_FTXURSTATUS (1 << 17)
-#define CON_FTXURINTEN (1 << 16)
-#define CON_TXFIFO2_EMPTY (1 << 15)
-#define CON_TXFIFO1_EMPTY (1 << 14)
-#define CON_TXFIFO2_FULL (1 << 13)
-#define CON_TXFIFO1_FULL (1 << 12)
-
-#define CON_LRINDEX (1 << 11)
-#define CON_TXFIFO_EMPTY (1 << 10)
-#define CON_RXFIFO_EMPTY (1 << 9)
-#define CON_TXFIFO_FULL (1 << 8)
-#define CON_RXFIFO_FULL (1 << 7)
-#define CON_TXDMA_PAUSE (1 << 6)
-#define CON_RXDMA_PAUSE (1 << 5)
-#define CON_TXCH_PAUSE (1 << 4)
-#define CON_RXCH_PAUSE (1 << 3)
-#define CON_TXDMA_ACTIVE (1 << 2)
-#define CON_RXDMA_ACTIVE (1 << 1)
-#define CON_ACTIVE (1 << 0)
-
-#define MOD_OPCLK_CDCLK_OUT (0 << 30)
-#define MOD_OPCLK_CDCLK_IN (1 << 30)
-#define MOD_OPCLK_BCLK_OUT (2 << 30)
-#define MOD_OPCLK_PCLK (3 << 30)
-#define MOD_OPCLK_MASK (3 << 30)
-#define MOD_TXS_IDMA (1 << 28) /* Sec_TXFIFO use I-DMA */
-
-#define MOD_BLCS_SHIFT 26
-#define MOD_BLCS_16BIT (0 << MOD_BLCS_SHIFT)
-#define MOD_BLCS_8BIT (1 << MOD_BLCS_SHIFT)
-#define MOD_BLCS_24BIT (2 << MOD_BLCS_SHIFT)
-#define MOD_BLCS_MASK (3 << MOD_BLCS_SHIFT)
-#define MOD_BLCP_SHIFT 24
-#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
-#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
-#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
-#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
-
-#define MOD_C2DD_HHALF (1 << 21) /* Discard Higher-half */
-#define MOD_C2DD_LHALF (1 << 20) /* Discard Lower-half */
-#define MOD_C1DD_HHALF (1 << 19)
-#define MOD_C1DD_LHALF (1 << 18)
-#define MOD_DC2_EN (1 << 17)
-#define MOD_DC1_EN (1 << 16)
-#define MOD_BLC_16BIT (0 << 13)
-#define MOD_BLC_8BIT (1 << 13)
-#define MOD_BLC_24BIT (2 << 13)
-#define MOD_BLC_MASK (3 << 13)
-
-#define MOD_IMS_SYSMUX (1 << 10)
-#define MOD_SLAVE (1 << 11)
-#define MOD_TXONLY (0 << 8)
-#define MOD_RXONLY (1 << 8)
-#define MOD_TXRX (2 << 8)
-#define MOD_MASK (3 << 8)
-#define MOD_LR_LLOW (0 << 7)
-#define MOD_LR_RLOW (1 << 7)
-#define MOD_SDF_IIS (0 << 5)
-#define MOD_SDF_MSB (1 << 5)
-#define MOD_SDF_LSB (2 << 5)
-#define MOD_SDF_MASK (3 << 5)
-#define MOD_RCLK_256FS (0 << 3)
-#define MOD_RCLK_512FS (1 << 3)
-#define MOD_RCLK_384FS (2 << 3)
-#define MOD_RCLK_768FS (3 << 3)
-#define MOD_RCLK_MASK (3 << 3)
-#define MOD_BCLK_32FS (0 << 1)
-#define MOD_BCLK_48FS (1 << 1)
-#define MOD_BCLK_16FS (2 << 1)
-#define MOD_BCLK_24FS (3 << 1)
-#define MOD_BCLK_MASK (3 << 1)
-#define MOD_8BIT (1 << 0)
-
-#define MOD_CDCLKCON (1 << 12)
-
-#define PSR_PSREN (1 << 15)
-
-#define FIC_TX2COUNT(x) (((x) >> 24) & 0xf)
-#define FIC_TX1COUNT(x) (((x) >> 16) & 0xf)
-
-#define FIC_TXFLUSH (1 << 15)
-#define FIC_RXFLUSH (1 << 7)
-#define FIC_TXCOUNT(x) (((x) >> 8) & 0xf)
-#define FIC_RXCOUNT(x) (((x) >> 0) & 0xf)
-#define FICS_TXCOUNT(x) (((x) >> 8) & 0x7f)
+#include "i2s-regs.h"
#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
--
1.7.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related register definition 2011-06-20 7:36 [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Sangbeom Kim @ 2011-06-20 7:36 ` Sangbeom Kim 2011-06-26 7:20 ` Jassi Brar 2011-06-26 11:05 ` Mark Brown 2011-06-20 7:36 ` [PATCH V3 3/4] ASoC: SAMSUNG: Modify I2S driver to support idma Sangbeom Kim ` (3 subsequent siblings) 4 siblings, 2 replies; 10+ messages in thread From: Sangbeom Kim @ 2011-06-20 7:36 UTC (permalink / raw) To: alsa-devel; +Cc: Sangbeom Kim, jassisinghbrar, broonie, lrg This patch add idma related register definitions to support idma. Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> --- sound/soc/samsung/i2s-regs.h | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/sound/soc/samsung/i2s-regs.h b/sound/soc/samsung/i2s-regs.h index 1fa0cd1..c0e6d9a 100644 --- a/sound/soc/samsung/i2s-regs.h +++ b/sound/soc/samsung/i2s-regs.h @@ -23,6 +23,14 @@ #define I2SRXD 0x14 #define I2SFICS 0x18 #define I2STXDS 0x1c +#define I2SAHB 0x20 +#define I2SSTR0 0x24 +#define I2SSIZE 0x28 +#define I2STRNCNT 0x2c +#define I2SLVL0ADDR 0x30 +#define I2SLVL1ADDR 0x34 +#define I2SLVL2ADDR 0x38 +#define I2SLVL3ADDR 0x3c #define CON_RSTCLR (1 << 31) #define CON_FRXOFSTATUS (1 << 26) @@ -114,10 +122,22 @@ #define FIC_TXFLUSH (1 << 15) #define FIC_RXFLUSH (1 << 7) + #define FIC_TXCOUNT(x) (((x) >> 8) & 0xf) #define FIC_RXCOUNT(x) (((x) >> 0) & 0xf) #define FICS_TXCOUNT(x) (((x) >> 8) & 0x7f) +#define AHB_INTENLVL0 (1 << 24) +#define AHB_LVL0INT (1 << 20) +#define AHB_CLRLVL0INT (1 << 16) +#define AHB_DMARLD (1 << 5) +#define AHB_INTMASK (1 << 3) +#define AHB_DMAEN (1 << 0) +#define AHB_LVLINTMASK (0xf << 20) + +#define I2SSIZE_TRNMSK (0xffff) +#define I2SSIZE_SHIFT (16) + #endif /* __SND_SOC_SAMSUNG_I2S_REGS_H */ -- 1.7.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related register definition 2011-06-20 7:36 ` [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related " Sangbeom Kim @ 2011-06-26 7:20 ` Jassi Brar 2011-06-26 11:05 ` Mark Brown 1 sibling, 0 replies; 10+ messages in thread From: Jassi Brar @ 2011-06-26 7:20 UTC (permalink / raw) To: Sangbeom Kim; +Cc: alsa-devel, broonie, lrg On Mon, Jun 20, 2011 at 1:06 PM, Sangbeom Kim <sbkim73@samsung.com> wrote: > This patch add idma related register definitions to support idma. > > Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Acked-by: Jassi brar <jassisinghbrar@gmail.com> > +#define I2SSIZE_SHIFT (16) Btw, no operation in C can take 6 separated from 1 of 16 Though I have told already, I don't wanna be the reason of yet another revision. _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related register definition 2011-06-20 7:36 ` [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related " Sangbeom Kim 2011-06-26 7:20 ` Jassi Brar @ 2011-06-26 11:05 ` Mark Brown 1 sibling, 0 replies; 10+ messages in thread From: Mark Brown @ 2011-06-26 11:05 UTC (permalink / raw) To: Sangbeom Kim; +Cc: alsa-devel, jassisinghbrar, lrg On Mon, Jun 20, 2011 at 04:36:19PM +0900, Sangbeom Kim wrote: > This patch add idma related register definitions to support idma. > > Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Applied this and patch 1. ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH V3 3/4] ASoC: SAMSUNG: Modify I2S driver to support idma 2011-06-20 7:36 [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Sangbeom Kim 2011-06-20 7:36 ` [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related " Sangbeom Kim @ 2011-06-20 7:36 ` Sangbeom Kim 2011-06-26 8:57 ` Jassi Brar 2011-06-20 7:36 ` [PATCH V3 4/4] ASoC: SAMSUNG: Add I2S0 internal dma driver Sangbeom Kim ` (2 subsequent siblings) 4 siblings, 1 reply; 10+ messages in thread From: Sangbeom Kim @ 2011-06-20 7:36 UTC (permalink / raw) To: alsa-devel; +Cc: Sangbeom Kim, jassisinghbrar, broonie, lrg Previously, I2S driver only can support system dma. In this patch, i2s driver can support internal dma too. Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> --- sound/soc/samsung/i2s.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index 1568eea..8b29c78 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c @@ -21,6 +21,7 @@ #include <plat/audio.h> #include "dma.h" +#include "idma.h" #include "i2s.h" #include "i2s-regs.h" @@ -544,9 +545,12 @@ static int i2s_hw_params(struct snd_pcm_substream *substream, { struct i2s_dai *i2s = to_info(dai); u32 mod = readl(i2s->addr + I2SMOD); + u32 ahb = 0; if (!is_secondary(i2s)) mod &= ~(MOD_DC2_EN | MOD_DC1_EN); + else + ahb = readl(i2s->addr + I2SAHB); switch (params_channels(params)) { case 6: @@ -600,6 +604,13 @@ static int i2s_hw_params(struct snd_pcm_substream *substream, params_format(params)); return -EINVAL; } + + if (is_secondary(i2s)) { + ahb |= (AHB_DMARLD | AHB_INTMASK); + mod |= MOD_TXS_IDMA; + writel(ahb, i2s->addr + I2SAHB); + } + writel(mod, i2s->addr + I2SMOD); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) @@ -1068,6 +1079,8 @@ static __devinit int samsung_i2s_probe(struct platform_device *pdev) ret = -ENOMEM; goto err2; } + idma_reg_addr_init((void *)ioremap(regs_base, 0x100), + i2s_cfg->idma_addr); sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; sec_dai->dma_playback.client = (struct s3c2410_dma_client *)&sec_dai->dma_playback; -- 1.7.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH V3 3/4] ASoC: SAMSUNG: Modify I2S driver to support idma 2011-06-20 7:36 ` [PATCH V3 3/4] ASoC: SAMSUNG: Modify I2S driver to support idma Sangbeom Kim @ 2011-06-26 8:57 ` Jassi Brar 0 siblings, 0 replies; 10+ messages in thread From: Jassi Brar @ 2011-06-26 8:57 UTC (permalink / raw) To: Sangbeom Kim; +Cc: alsa-devel, broonie, lrg On Mon, Jun 20, 2011 at 1:06 PM, Sangbeom Kim <sbkim73@samsung.com> wrote: > + > + if (is_secondary(i2s)) { > + ahb |= (AHB_DMARLD | AHB_INTMASK); > + mod |= MOD_TXS_IDMA; This unconditional setting stealthily switches to using iDMA. Sorry I didn't notice it in last revision. > + writel(ahb, i2s->addr + I2SAHB); > + } > + I meant, this is _dma_ related setting of post-24xx So it had better be done in hw_params of idma.c > @@ -1068,6 +1079,8 @@ static __devinit int samsung_i2s_probe(struct platform_device *pdev) > ret = -ENOMEM; > goto err2; > } > + idma_reg_addr_init((void *)ioremap(regs_base, 0x100), > + i2s_cfg->idma_addr); Oh dear! Not a great idea to do multiple mapping, even worse is doing it transiently during a function call. Perhaps provide base and iBuff address via platform data of samsung-idma and pass only _once_ ioremap'ed address from here. _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH V3 4/4] ASoC: SAMSUNG: Add I2S0 internal dma driver 2011-06-20 7:36 [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Sangbeom Kim 2011-06-20 7:36 ` [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related " Sangbeom Kim 2011-06-20 7:36 ` [PATCH V3 3/4] ASoC: SAMSUNG: Modify I2S driver to support idma Sangbeom Kim @ 2011-06-20 7:36 ` Sangbeom Kim 2011-06-26 11:08 ` Jassi Brar 2011-06-20 10:32 ` [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Mark Brown 2011-06-26 7:14 ` Jassi Brar 4 siblings, 1 reply; 10+ messages in thread From: Sangbeom Kim @ 2011-06-20 7:36 UTC (permalink / raw) To: alsa-devel; +Cc: Sangbeom Kim, jassisinghbrar, broonie, lrg I2S in Exynos4 and S5PC110(S5PV210) has a internal dma. It can be used low power audio mode and 2nd channel transfer. Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> --- sound/soc/samsung/Makefile | 2 + sound/soc/samsung/idma.c | 480 ++++++++++++++++++++++++++++++++++++++++++++ sound/soc/samsung/idma.h | 26 +++ 3 files changed, 508 insertions(+), 0 deletions(-) create mode 100644 sound/soc/samsung/idma.c create mode 100644 sound/soc/samsung/idma.h diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile index 683843a..2b9e251 100644 --- a/sound/soc/samsung/Makefile +++ b/sound/soc/samsung/Makefile @@ -1,5 +1,6 @@ # S3c24XX Platform Support snd-soc-s3c24xx-objs := dma.o +snd-soc-idma-objs := idma.o snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o snd-soc-ac97-objs := ac97.o @@ -16,6 +17,7 @@ obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o obj-$(CONFIG_SND_SAMSUNG_SPDIF) += snd-soc-samsung-spdif.o obj-$(CONFIG_SND_SAMSUNG_PCM) += snd-soc-pcm.o obj-$(CONFIG_SND_SAMSUNG_I2S) += snd-soc-i2s.o +obj-$(CONFIG_SND_SAMSUNG_I2S) += snd-soc-idma.o # S3C24XX Machine Support snd-soc-jive-wm8750-objs := jive_wm8750.o diff --git a/sound/soc/samsung/idma.c b/sound/soc/samsung/idma.c new file mode 100644 index 0000000..db8b07d --- /dev/null +++ b/sound/soc/samsung/idma.c @@ -0,0 +1,480 @@ +/* + * linux/sound/soc/samsung/idma.c + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * I2S0's Internal DMA driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#include <linux/slab.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> + +#include "i2s.h" +#include "idma.h" +#include "dma.h" +#include "i2s-regs.h" + +#define ST_RUNNING (1<<0) +#define ST_OPENED (1<<1) + +static struct device *dev; +static const struct snd_pcm_hardware idma_hardware = { + .info = SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_U16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_U24_LE | + SNDRV_PCM_FMTBIT_U8 | + SNDRV_PCM_FMTBIT_S8, + .channels_min = 2, + .channels_max = 2, + .buffer_bytes_max = MAX_IDMA_BUFFER, + .period_bytes_min = 128, + .period_bytes_max = MAX_IDMA_PERIOD, + .periods_min = 1, + .periods_max = 2, +}; + +struct idma_ctrl { + spinlock_t lock; + int state; + dma_addr_t start; + dma_addr_t pos; + dma_addr_t end; + dma_addr_t period; + dma_addr_t periodsz; + void *token; + void (*cb)(void *dt, int bytes_xfer); +}; + +static struct idma_info { + spinlock_t lock; + void __iomem *regs; + dma_addr_t lp_tx_addr; +} idma; + +static void idma_getpos(dma_addr_t *src) +{ + *src = idma.lp_tx_addr + + (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; +} + +static int idma_enqueue(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct idma_ctrl *prtd = substream->runtime->private_data; + u32 val; + + spin_lock(&prtd->lock); + prtd->token = (void *) substream; + spin_unlock(&prtd->lock); + + /* Internal DMA Level0 Interrupt Address */ + val = idma.lp_tx_addr + prtd->periodsz; + writel(val, idma.regs + I2SLVL0ADDR); + + /* Start address0 of I2S internal DMA operation. */ + val = idma.lp_tx_addr; + writel(val, idma.regs + I2SSTR0); + + /* + * Transfer block size for I2S internal DMA. + * Should decide transfer size before start dma operation + */ + val = readl(idma.regs + I2SSIZE); + val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT); + val |= (((runtime->dma_bytes >> 2) & + I2SSIZE_TRNMSK) << I2SSIZE_SHIFT); + writel(val, idma.regs + I2SSIZE); + + val = readl(idma.regs + I2SAHB); + val |= AHB_INTENLVL0; + writel(val, idma.regs + I2SAHB); + + return 0; +} + +static void idma_setcallbk(struct snd_pcm_substream *substream, + void (*cb)(void *, int)) +{ + struct idma_ctrl *prtd = substream->runtime->private_data; + + spin_lock(&prtd->lock); + prtd->cb = cb; + spin_unlock(&prtd->lock); + + dev_dbg(dev, "%s:%d dma_period=%x\n", __func__, __LINE__, prtd->periodsz); +} + +static void idma_control(int op) +{ + u32 val = readl(idma.regs + I2SAHB); + + spin_lock(&idma.lock); + + switch (op) { + case LPAM_DMA_START: + val |= (AHB_INTENLVL0 | AHB_DMAEN); + break; + case LPAM_DMA_STOP: + val &= ~(AHB_INTENLVL0 | AHB_DMAEN); + break; + default: + return; + } + + writel(val, idma.regs + I2SAHB); + spin_unlock(&idma.lock); +} + +static void idma_done(void *id, int bytes_xfer) +{ + struct snd_pcm_substream *substream = id; + struct idma_ctrl *prtd = substream->runtime->private_data; + + if (prtd && (prtd->state & ST_RUNNING)) + snd_pcm_period_elapsed(substream); +} + +static int idma_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct idma_ctrl *prtd = substream->runtime->private_data; + + dev_dbg(dev, "Entered %s\n", __func__); + + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + runtime->dma_bytes = params_buffer_bytes(params); + + prtd->start = prtd->pos = runtime->dma_addr; + prtd->period = params_periods(params); + prtd->periodsz = params_period_bytes(params); + prtd->end = runtime->dma_addr + runtime->dma_bytes; + + idma_setcallbk(substream, idma_done); + + dev_dbg(dev, "DmaAddr=@%x Total=%dbytes PrdSz=%d #Prds=%d dma_area=0x%x\n", + prtd->start, runtime->dma_bytes, prtd->periodsz, + prtd->period, (unsigned int)runtime->dma_area); + + return 0; +} + +static int idma_hw_free(struct snd_pcm_substream *substream) +{ + dev_dbg(dev, "Entered %s\n", __func__); + + snd_pcm_set_runtime_buffer(substream, NULL); + + return 0; +} + +static int idma_prepare(struct snd_pcm_substream *substream) +{ + struct idma_ctrl *prtd = substream->runtime->private_data; + + dev_dbg(dev, "Entered %s\n", __func__); + + prtd->pos = prtd->start; + + /* flush the DMA channel */ + idma_control(LPAM_DMA_STOP); + idma_enqueue(substream); + + return 0; +} + +static int idma_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct idma_ctrl *prtd = substream->runtime->private_data; + int ret = 0; + + dev_dbg(dev, "Entered %s\n", __func__); + + spin_lock(&prtd->lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + prtd->state |= ST_RUNNING; + idma_control(LPAM_DMA_START); + break; + + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + prtd->state &= ~ST_RUNNING; + idma_control(LPAM_DMA_STOP); + break; + + default: + ret = -EINVAL; + break; + } + + spin_unlock(&prtd->lock); + + return ret; +} + +static snd_pcm_uframes_t + idma_pointer(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct idma_ctrl *prtd = runtime->private_data; + dma_addr_t src; + unsigned long res; + + dev_dbg(dev, "Entered %s\n", __func__); + + spin_lock(&prtd->lock); + + idma_getpos(&src); + res = src - prtd->start; + + spin_unlock(&prtd->lock); + + dev_dbg(dev, "Pointer %x \n", src); + + if (res >= snd_pcm_lib_buffer_bytes(substream)) { + res = 0; + } + + return bytes_to_frames(substream->runtime, res); +} + +static int idma_mmap(struct snd_pcm_substream *substream, + struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + unsigned long size, offset; + int ret; + + dev_dbg(dev, "Entered %s\n", __func__); + + /* From snd_pcm_lib_mmap_iomem */ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + vma->vm_flags |= VM_IO; + size = vma->vm_end - vma->vm_start; + offset = vma->vm_pgoff << PAGE_SHIFT; + ret = io_remap_pfn_range(vma, vma->vm_start, + (runtime->dma_addr + offset) >> PAGE_SHIFT, + size, vma->vm_page_prot); + + return ret; +} + +static irqreturn_t iis_irq(int irqno, void *dev_id) +{ + struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id; + u32 iiscon, iisahb, val, addr; + + iisahb = readl(idma.regs + I2SAHB); + iiscon = readl(idma.regs + I2SCON); + + val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0; + + if (val) { + iisahb |= val; + writel(iisahb, idma.regs + I2SAHB); + + addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr; + addr += prtd->period; + addr %= prtd->periodsz; + addr += idma.lp_tx_addr; + + writel(addr, idma.regs + I2SLVL0ADDR); + + if (prtd->cb) + prtd->cb(prtd->token, prtd->period); + } + + return IRQ_HANDLED; +} + +static int idma_open(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct idma_ctrl *prtd; + int ret; + + dev_dbg(dev, "Entered %s\n", __func__); + + snd_soc_set_runtime_hwparams(substream, &idma_hardware); + + prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL); + if (prtd == NULL) + return -ENOMEM; + + ret = request_irq(IRQ_I2S0, iis_irq, 0, "i2s", prtd); + if (ret < 0) { + pr_err("fail to claim i2s irq , ret = %d\n", ret); + kfree(prtd); + return ret; + } + + spin_lock_init(&prtd->lock); + + runtime->private_data = prtd; + + return 0; +} + +static int idma_close(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct idma_ctrl *prtd = runtime->private_data; + + dev_dbg(dev, "Entered %s, prtd = %p\n", __func__, prtd); + + free_irq(IRQ_I2S0, prtd); + + if (!prtd) + pr_err("idma_close called with prtd == NULL\n"); + + kfree(prtd); + + return 0; +} + +static struct snd_pcm_ops idma_ops = { + .open = idma_open, + .close = idma_close, + .ioctl = snd_pcm_lib_ioctl, + .trigger = idma_trigger, + .pointer = idma_pointer, + .mmap = idma_mmap, + .hw_params = idma_hw_params, + .hw_free = idma_hw_free, + .prepare = idma_prepare, +}; + +static void idma_free(struct snd_pcm *pcm) +{ + struct snd_pcm_substream *substream; + struct snd_dma_buffer *buf; + + dev_dbg(dev, "Entered %s\n", __func__); + + substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; + if (!substream) + return; + + buf = &substream->dma_buffer; + if (!buf->area) + return; + + iounmap(buf->area); + + buf->area = NULL; + buf->addr = 0; +} + +static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream) +{ + struct snd_pcm_substream *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + + dev_dbg(dev, "Entered %s\n", __func__); + buf->dev.dev = pcm->card->dev; + buf->private_data = NULL; + + /* Assign PCM buffer pointers */ + buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS; + buf->addr = idma.lp_tx_addr; + buf->bytes = idma_hardware.buffer_bytes_max; + buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes); + dev_dbg(dev, "%s: VA-%p PA-%X %ubytes\n", + __func__, buf->area, buf->addr, buf->bytes); + + return 0; +} + +static u64 idma_mask = DMA_BIT_MASK(32); + +static int idma_new(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_card *card = rtd->card->snd_card; + struct snd_soc_dai *dai = rtd->cpu_dai; + struct snd_pcm *pcm = rtd->pcm; + int ret = 0; + + dev_dbg(dev, "Entered %s\n", __func__); + if (!card->dev->dma_mask) + card->dev->dma_mask = &idma_mask; + if (!card->dev->coherent_dma_mask) + card->dev->coherent_dma_mask = DMA_BIT_MASK(32); + + if (dai->driver->playback.channels_min) + ret = preallocate_idma_buffer(pcm, + SNDRV_PCM_STREAM_PLAYBACK); + + return ret; +} + +void idma_reg_addr_init(void *regs, dma_addr_t addr) +{ + spin_lock_init(&idma.lock); + idma.regs = regs; + idma.lp_tx_addr = addr; +} + +struct snd_soc_platform_driver asoc_idma_platform = { + .ops = &idma_ops, + .pcm_new = idma_new, + .pcm_free = idma_free, +}; + +static int __devinit asoc_idma_platform_probe(struct platform_device *pdev) +{ + return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform); +} + +static int __devexit asoc_idma_platform_remove(struct platform_device *pdev) +{ + snd_soc_unregister_platform(&pdev->dev); + return 0; +} + +static struct platform_driver asoc_idma_driver = { + .driver = { + .name = "samsung-idma", + .owner = THIS_MODULE, + }, + + .probe = asoc_idma_platform_probe, + .remove = __devexit_p(asoc_idma_platform_remove), +}; + +static int __init asoc_idma_init(void) +{ + return platform_driver_register(&asoc_idma_driver); +} +module_init(asoc_idma_init); + +static void __exit asoc_idma_exit(void) +{ + platform_driver_unregister(&asoc_idma_driver); +} +module_exit(asoc_idma_exit); + +MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>"); +MODULE_DESCRIPTION("Samsung ASoC IDMA Driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/samsung/idma.h b/sound/soc/samsung/idma.h new file mode 100644 index 0000000..94d3580 --- /dev/null +++ b/sound/soc/samsung/idma.h @@ -0,0 +1,26 @@ +/* + * linux/sound/soc/samsung/idma.h + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __SND_SOC_SAMSUNG_IDMA_H_ +#define __SND_SOC_SAMSUNG_IDMA_H_ + +extern void idma_reg_addr_init(void *regs, dma_addr_t addr); + +/* dma_state */ +#define LPAM_DMA_STOP 0 +#define LPAM_DMA_START 1 + +#define MAX_IDMA_PERIOD (105 * 1024) +#define MAX_IDMA_BUFFER (128 * 1024) + +#endif /* __SND_SOC_SAMSUNG_IDMA_H_ */ -- 1.7.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH V3 4/4] ASoC: SAMSUNG: Add I2S0 internal dma driver 2011-06-20 7:36 ` [PATCH V3 4/4] ASoC: SAMSUNG: Add I2S0 internal dma driver Sangbeom Kim @ 2011-06-26 11:08 ` Jassi Brar 0 siblings, 0 replies; 10+ messages in thread From: Jassi Brar @ 2011-06-26 11:08 UTC (permalink / raw) To: Sangbeom Kim; +Cc: alsa-devel, broonie, lrg On Mon, Jun 20, 2011 at 1:06 PM, Sangbeom Kim <sbkim73@samsung.com> wrote: > + > +static struct device *dev; Dear there is more to the first argument of dev_dbg, than to silence the compiler. Please extract _real_ device underneath samsung_idma, rather than using this placeholder. > +static const struct snd_pcm_hardware idma_hardware = { > + .info = SNDRV_PCM_INFO_INTERLEAVED | > + SNDRV_PCM_INFO_BLOCK_TRANSFER | > + SNDRV_PCM_INFO_MMAP | > + SNDRV_PCM_INFO_MMAP_VALID | > + SNDRV_PCM_INFO_PAUSE | > + SNDRV_PCM_INFO_RESUME, > + .formats = SNDRV_PCM_FMTBIT_S16_LE | > + SNDRV_PCM_FMTBIT_U16_LE | > + SNDRV_PCM_FMTBIT_S24_LE | > + SNDRV_PCM_FMTBIT_U24_LE | > + SNDRV_PCM_FMTBIT_U8 | > + SNDRV_PCM_FMTBIT_S8, > + .channels_min = 2, > + .channels_max = 2, > + .buffer_bytes_max = MAX_IDMA_BUFFER, > + .period_bytes_min = 128, > + .period_bytes_max = MAX_IDMA_PERIOD, > + .periods_min = 1, > + .periods_max = 2, How about ouput of aply -v sample.wav ? Most probably ALSA uses 2 periods of MAX_IDMA_BUFFER/2 bytes each. Is that what you expect ? I would want ALSA to always use 1 period of MAX_IDMA_PERIOD bytes and ring-buffer of MAX_IDMA_BUFFER bytes. > +struct idma_ctrl { > + spinlock_t lock; > + int state; > + dma_addr_t start; > + dma_addr_t pos; > + dma_addr_t end; This 'end' member is useless. Perhaps ringbuffer 'size' will be more useful. > + dma_addr_t period; > + dma_addr_t periodsz; > + void *token; > + void (*cb)(void *dt, int bytes_xfer); > +}; > + > + > + if (res >= snd_pcm_lib_buffer_bytes(substream)) { > + res = 0; > + } Dropping braces would be nice. > + addr += prtd->period; > + addr %= prtd->periodsz; This is wrong. Perhaps you want... addr += prtd->periodsz; addr %= prtd->size; I doubt one could miss this error if the driver was tested. > + > +MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>"); Sent emails will bounce from jassi.brar@samsung.com. Please use jassisinghbrar@gmail.com > +#define MAX_IDMA_PERIOD (105 * 1024) > +#define MAX_IDMA_BUFFER (128 * 1024) IIRC not all SoCs have same size iBuff ? Maybe passing via platform_data would be good ? _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition 2011-06-20 7:36 [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Sangbeom Kim ` (2 preceding siblings ...) 2011-06-20 7:36 ` [PATCH V3 4/4] ASoC: SAMSUNG: Add I2S0 internal dma driver Sangbeom Kim @ 2011-06-20 10:32 ` Mark Brown 2011-06-26 7:14 ` Jassi Brar 4 siblings, 0 replies; 10+ messages in thread From: Mark Brown @ 2011-06-20 10:32 UTC (permalink / raw) To: Sangbeom Kim; +Cc: alsa-devel, jassisinghbrar, lrg On Mon, Jun 20, 2011 at 04:36:18PM +0900, Sangbeom Kim wrote: > +#define I2SCON 0x0 > +#define I2SMOD 0x4 > +#define I2SFIC 0x8 > +#define I2SPSR 0xc > +#define I2STXD 0x10 > +#define I2SRXD 0x14 > +#define I2SFICS 0x18 > +#define I2STXDS 0x1c It'd be better to namespace things in header files, though if the header is only included in a single driver it doesn't really matter so much. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition 2011-06-20 7:36 [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Sangbeom Kim ` (3 preceding siblings ...) 2011-06-20 10:32 ` [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Mark Brown @ 2011-06-26 7:14 ` Jassi Brar 4 siblings, 0 replies; 10+ messages in thread From: Jassi Brar @ 2011-06-26 7:14 UTC (permalink / raw) To: Sangbeom Kim; +Cc: alsa-devel, broonie, lrg On Mon, Jun 20, 2011 at 1:06 PM, Sangbeom Kim <sbkim73@samsung.com> wrote: > I2S registers can be used for control idma. > Previously, register is defined in i2s.c. > For sharing the registers, It is moved to i2s-regs.h > > Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Acked-by: Jassi brar <jassisinghbrar@gmail.com> ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2011-06-26 11:08 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2011-06-20 7:36 [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Sangbeom Kim 2011-06-20 7:36 ` [PATCH V3 2/4] ASoC: SAMSUNG: Add idma related " Sangbeom Kim 2011-06-26 7:20 ` Jassi Brar 2011-06-26 11:05 ` Mark Brown 2011-06-20 7:36 ` [PATCH V3 3/4] ASoC: SAMSUNG: Modify I2S driver to support idma Sangbeom Kim 2011-06-26 8:57 ` Jassi Brar 2011-06-20 7:36 ` [PATCH V3 4/4] ASoC: SAMSUNG: Add I2S0 internal dma driver Sangbeom Kim 2011-06-26 11:08 ` Jassi Brar 2011-06-20 10:32 ` [PATCH V3 1/4] ASoC: SAMSUNG: Move I2S common register definition Mark Brown 2011-06-26 7:14 ` Jassi Brar
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