From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: Re: snd soc spi read/write
Date: Fri, 5 Aug 2011 07:34:14 +0100
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To: Scott Jiang <scott.jiang.linux@gmail.com>
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On Fri, Aug 05, 2011 at 02:26:33PM +0800, Scott Jiang wrote:

> My register address is 0x806(8bit global addr + 8bit reg addr), for
> example,  reg_cache_size is 0x20.
> snd_soc_cache_write will not be called. And kernel oops in do_hw_read

> BUG_ON(!codec->hw_read);

> That is what I found when asoc was upgraded to 3.0, my codec is ad1938.

> The key issue is register is 8 bits, hardware needs 16 bits addr. If I
> change reg_cache_size to 2^16=64K, I think everything goes well.
> But it will waste a lot of memory for only 32 registers.

Oh, this is just fail.  Does the hardware have readback support?