From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: Re: snd soc spi read/write
Date: Fri, 5 Aug 2011 09:30:59 +0100
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To: Scott Jiang <scott.jiang.linux@gmail.com>
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On Fri, Aug 05, 2011 at 04:00:52PM +0800, Scott Jiang wrote:

> > Why are you replying off-list? =A0You should implement 16x8 SPI reads in
> > the core stuff I'd expect, then disable cache for the CODEC.

> Sorry, I just forgot to CC.
> I wonder if rbtree compress type can support this kind of sparse register?

Yes, rbtree works fine with this.  You'd still take a hit on the size of
your register defaults though.

> And should the patch aginst 3.0 or 3.2?

3.0 can't be patched, though you could try submitting a patch to the
stable guys.  Probably best to start off with 3.1 and see where we go
from there.