* [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs
@ 2011-10-13 6:40 Axel Lin
2011-10-13 6:57 ` [PATCH] ASoC: sta32x: Write the register default value to cache for reserved registers Axel Lin
2011-10-13 10:51 ` [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs Mark Brown
0 siblings, 2 replies; 4+ messages in thread
From: Axel Lin @ 2011-10-13 6:40 UTC (permalink / raw)
To: linux-kernel; +Cc: Liam Girdwood, Mark Brown, Johannes Stezenbach, alsa-devel
Signed-off-by: Axel Lin <axel.lin@gmail.com>
---
sound/soc/codecs/sta32x.c | 5 +----
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c
index 5c7def3..754b3ff 100644
--- a/sound/soc/codecs/sta32x.c
+++ b/sound/soc/codecs/sta32x.c
@@ -756,10 +756,6 @@ static int sta32x_probe(struct snd_soc_codec *codec)
return ret;
}
- /* read reg reset values into cache */
- for (i = 0; i < STA32X_REGISTER_COUNT; i++)
- snd_soc_cache_write(codec, i, sta32x_regs[i]);
-
/* preserve reset values of reserved register bits */
snd_soc_cache_write(codec, STA32X_CONFC,
codec->hw_read(codec, STA32X_CONFC));
@@ -837,6 +833,7 @@ static const struct snd_soc_codec_driver sta32x_codec = {
.resume = sta32x_resume,
.reg_cache_size = STA32X_REGISTER_COUNT,
.reg_word_size = sizeof(u8),
+ .reg_cache_default = sta32x_regs,
.volatile_register = sta32x_reg_is_volatile,
.set_bias_level = sta32x_set_bias_level,
.controls = sta32x_snd_controls,
--
1.7.4.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] ASoC: sta32x: Write the register default value to cache for reserved registers
2011-10-13 6:40 [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs Axel Lin
@ 2011-10-13 6:57 ` Axel Lin
2011-10-13 10:51 ` Mark Brown
2011-10-13 10:51 ` [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs Mark Brown
1 sibling, 1 reply; 4+ messages in thread
From: Axel Lin @ 2011-10-13 6:57 UTC (permalink / raw)
To: linux-kernel; +Cc: Mark Brown, Liam Girdwood, alsa-devel
Chip documentation explicitly requires that the reset values
of reserved register bits are left untouched.
codec->hw_read is broken now.
Here we use below trick to avoid writing to reserved registers while resume.
Write the register default value to cache for reserved registers,
so the write to the these registers are suppressed by the cache
restore code when it skips writes of default registers.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
---
sound/soc/codecs/sta32x.c | 28 +++++++++++++---------------
1 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c
index 754b3ff..bb82408 100644
--- a/sound/soc/codecs/sta32x.c
+++ b/sound/soc/codecs/sta32x.c
@@ -756,21 +756,19 @@ static int sta32x_probe(struct snd_soc_codec *codec)
return ret;
}
- /* preserve reset values of reserved register bits */
- snd_soc_cache_write(codec, STA32X_CONFC,
- codec->hw_read(codec, STA32X_CONFC));
- snd_soc_cache_write(codec, STA32X_CONFE,
- codec->hw_read(codec, STA32X_CONFE));
- snd_soc_cache_write(codec, STA32X_CONFF,
- codec->hw_read(codec, STA32X_CONFF));
- snd_soc_cache_write(codec, STA32X_MMUTE,
- codec->hw_read(codec, STA32X_MMUTE));
- snd_soc_cache_write(codec, STA32X_AUTO1,
- codec->hw_read(codec, STA32X_AUTO1));
- snd_soc_cache_write(codec, STA32X_AUTO3,
- codec->hw_read(codec, STA32X_AUTO3));
- snd_soc_cache_write(codec, STA32X_C3CFG,
- codec->hw_read(codec, STA32X_C3CFG));
+ /* Chip documentation explicitly requires that the reset values
+ * of reserved register bits are left untouched.
+ * Write the register default value to cache for reserved registers,
+ * so the write to the these registers are suppressed by the cache
+ * restore code when it skips writes of default registers.
+ */
+ snd_soc_cache_write(codec, STA32X_CONFC, 0xc2);
+ snd_soc_cache_write(codec, STA32X_CONFE, 0xc2);
+ snd_soc_cache_write(codec, STA32X_CONFF, 0x5c);
+ snd_soc_cache_write(codec, STA32X_MMUTE, 0x10);
+ snd_soc_cache_write(codec, STA32X_AUTO1, 0x60);
+ snd_soc_cache_write(codec, STA32X_AUTO3, 0x00);
+ snd_soc_cache_write(codec, STA32X_C3CFG, 0x40);
/* FIXME enable thermal warning adjustment and recovery */
snd_soc_update_bits(codec, STA32X_CONFA,
--
1.7.4.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs
2011-10-13 6:40 [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs Axel Lin
2011-10-13 6:57 ` [PATCH] ASoC: sta32x: Write the register default value to cache for reserved registers Axel Lin
@ 2011-10-13 10:51 ` Mark Brown
1 sibling, 0 replies; 4+ messages in thread
From: Mark Brown @ 2011-10-13 10:51 UTC (permalink / raw)
To: Axel Lin; +Cc: linux-kernel, alsa-devel, Liam Girdwood
On Thu, Oct 13, 2011 at 02:40:08PM +0800, Axel Lin wrote:
> Signed-off-by: Axel Lin <axel.lin@gmail.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ASoC: sta32x: Write the register default value to cache for reserved registers
2011-10-13 6:57 ` [PATCH] ASoC: sta32x: Write the register default value to cache for reserved registers Axel Lin
@ 2011-10-13 10:51 ` Mark Brown
0 siblings, 0 replies; 4+ messages in thread
From: Mark Brown @ 2011-10-13 10:51 UTC (permalink / raw)
To: Axel Lin; +Cc: linux-kernel, alsa-devel, Liam Girdwood
On Thu, Oct 13, 2011 at 02:57:31PM +0800, Axel Lin wrote:
> Chip documentation explicitly requires that the reset values
> of reserved register bits are left untouched.
Applied, but this seems really wierd - shouldn't we just be getting this
stuff from the cache defaults? Why do we explicitly need to write to
the cache?
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2011-10-13 10:52 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2011-10-13 6:40 [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs Axel Lin
2011-10-13 6:57 ` [PATCH] ASoC: sta32x: Write the register default value to cache for reserved registers Axel Lin
2011-10-13 10:51 ` Mark Brown
2011-10-13 10:51 ` [PATCH] ASoC: sta32x: Set reg_cache_default to sta32x_regs Mark Brown
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