From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: Re: [PATCH] ASoC: tegra: fix maxburst settings in
	dmaengine code
Date: Fri, 7 Sep 2012 09:51:57 +0800
Message-ID: <20120907015155.GA6827@opensource.wolfsonmicro.com>
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To: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org, Laxman Dewangan <ldewangan@nvidia.com>, Stephen Warren <swarren@nvidia.com>, Liam Girdwood <lrg@ti.com>
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On Thu, Sep 06, 2012 at 05:47:33PM -0600, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> The I2S controllers are programmed with an "attention" level of 4 DWORDs.
> This must match the configuration passed to the DMA driver, so that when
> they burst in data, they don't overflow the available FIFO space. Also,
> the burst size is relevant to the destination for playback, and source
> for capture, not vice-versa as originally written.

Applied, thanks.