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From: Mark Brown <broonie@kernel.org>
To: Kenneth Westfield <kwestfie@codeaurora.org>
Cc: Takashi Iwai <tiwai@suse.de>, Liam Girdwood <lgirdwood@gmail.com>,
	David Brown <davidb@codeaurora.org>,
	Bryan Huntsman <bryanh@codeaurora.org>,
	Greg KH <gregkh@linuxfoundation.org>,
	Patrick Lai <plai@codeaurora.org>,
	Banajit Goswami <bgoswami@codeaurora.org>,
	ALSA Mailing List <alsa-devel@alsa-project.org>,
	Device Tree Mailing List <devicetree@vger.kernel.org>,
	MSM Mailing List <linux-arm-msm@vger.kernel.org>
Subject: Re: [Patch v2 05/11] ASoC: ipq806x: Add LPASS CPU DAI driver
Date: Tue, 9 Dec 2014 16:01:25 +0000	[thread overview]
Message-ID: <20141209160125.GD1934@sirena.org.uk> (raw)
In-Reply-To: <1418076073-12623-6-git-send-email-kwestfie@codeaurora.org>

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On Mon, Dec 08, 2014 at 02:01:07PM -0800, Kenneth Westfield wrote:

Please stop CCing Rob Herring's Calxeda address, it bounces.

> +	default:
> +		pr_err("%s: invalid bitwidth given: %u\n", __func__, bitwidth);
> +		return -EINVAL;
> +	}

Repeating again: dev_err().

> +	ret = lpass_lpaif_mi2s_channels(prtd, channels, bit_act);

> +	ret = lpass_lpaif_mi2s_bitwidth(prtd, bitwidth);

Just inline these helper functions, they're basically just abstracting a
single switch statement each which adds little if anything.

> +static int lpass_cpu_mi2s_daiops_hw_free(struct snd_pcm_substream *substream,
> +		struct snd_soc_dai *dai)
> +{
> +	struct lpass_cpu_mi2s_data *prtd = snd_soc_dai_get_drvdata(dai);
> +
> +	if (prtd->mi2s_clocks_enabled) {
> +		clk_disable_unprepare(prtd->mi2s_osr_clk);
> +		clk_disable_unprepare(prtd->mi2s_bit_clk);
> +	}

This seems problematic, why is the clock being disabled here rather than
in a place matching that where it was enabled so we don't need to do
this checking.  I suspect you should be using a DAPM widget to manage
the clocks.

> +	prtd->irq_acquired = 0;

What is this supposed to do?  It looks write only.

> +#ifndef _LPASS_CPU_MI2S_H
> +#define _LPASS_CPU_MI2S_H
> +
> +enum pinctrl_pin_state {
> +	STATE_DISABLED = 0,
> +	STATE_ENABLED = 1
> +};
> +static const char *const pin_states[] = {"Disabled", "Enabled"};

This apppears to be the same pinctrl stuff you had in the Maxim CODEC
driver.  Similar issues with reproducing core pinctrl functionality
apply here too, and the fact that the code has been cut'n'pasted between
different drivers isn't a good sign.

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  reply	other threads:[~2014-12-09 16:01 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-08 22:01 [Patch v2 00/11] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
2014-12-08 22:01 ` [Patch v2 01/11] MAINTAINERS: Add QCOM audio ASoC maintainer Kenneth Westfield
2014-12-08 22:01 ` [Patch v2 02/11] ASoC: qcom: Add device tree binding docs Kenneth Westfield
2014-12-09 15:37   ` Mark Brown
2014-12-08 22:01 ` [Patch v2 03/11] ASoC: ipq806x: add LPAIF header file Kenneth Westfield
2014-12-08 22:01 ` [Patch v2 04/11] ASoC: codec: Add Maxim codec driver Kenneth Westfield
2014-12-09 15:53   ` Mark Brown
2014-12-08 22:01 ` [Patch v2 05/11] ASoC: ipq806x: Add LPASS CPU DAI driver Kenneth Westfield
2014-12-09 16:01   ` Mark Brown [this message]
2014-12-08 22:01 ` [Patch v2 06/11] ASoC: ipq806x: Add I2S PCM platform driver Kenneth Westfield
2014-12-09 16:04   ` Mark Brown
     [not found] ` <1418076073-12623-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-12-08 22:01   ` [Patch v2 07/11] ASoC: ipq806x: Add machine driver for IPQ806X SOC Kenneth Westfield
2014-12-09 16:05     ` Mark Brown
2014-12-08 22:01   ` [Patch v2 08/11] ASoC: codec: Add ability to build QCOM codec Kenneth Westfield
2014-12-09 16:06     ` Mark Brown
2014-12-08 22:01 ` [Patch v2 09/11] ASoC: qcom: Add ability to build QCOM drivers Kenneth Westfield
2014-12-09 16:07   ` Mark Brown
2014-12-08 22:01 ` [Patch v2 10/11] ASoC: Allow for building " Kenneth Westfield
2014-12-08 22:01 ` [Patch v2 11/11] ARM: dts: Model IPQ LPASS audio hardware Kenneth Westfield
2014-12-09 16:08   ` Mark Brown

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