Re: [PATCH V2 1/4] regmap: cache: Add "was_reset" argument to regcache_sync_region()

[Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>]

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On Tue, Apr 28, 2015 at 09:58:48PM -0700, Kevin Cernekee wrote:
> On Sat, Apr 25, 2015 at 4:32 AM, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:

> > What we should be doing here is providing a way for users to tell regmap
> > if they've reset the register map and actually we already have that
> > interface, it's just not got the best name - regcache_mark_dirty() is
> > effectively it since there's really not a lot of other reasons why a
> > driver would need to mark the cache as dirty.  We're just not handling

> 1) How do we tell the difference between "regcache contains a
> non-default value that correctly reflects the hardware register
> contents" versus "regcache contains a non-default value that is
> waiting to be written when we exit cache_only mode"?

Like I said above we can tell if the hardware was reset because
mark_dirty() is called.

> 2) Does that also mean that we should store default values in the
> rbtree if they are part of a deferred cache_only write, but not store
> them if the write went through to the hardware?

Well, remember that it's very expensive to remove a value from the cache
so actively trying to prune the cache would be bad.

> 3) If we're caching the default values lazily, does that mean that
> every regcache read would incur both an rbtree lookup and a bsearch of
> the reg_defaults array?

That'd happen on first read, yes.

> 4) If "the only things in the cache will be things that have been
> explicitly changed," that could impact the semantics of
> regcache_drop_region().  Which fortunately has no users.

Could you articulate what changes you believe would be seen?

> Seems like it would be more straightforward just to add an
> rbnode->dirty bitmask alongside rbnode->cache_present, rather than
> trying to infer the hardware state from the presence/absence of the
> cache entry.  Knowing whether each individual register is out of sync
> with the hardware lets us avoid unnecessary writes in both situations:
> full reset, and temporary loss of register access.

I'm not suggesting that we do anything based on the presence of a cache
entry, I'm suggesting that we could avoid having to ever cache values
that never get referenced on a system (which can be a lot of them for
common use cases) saving us memory.  Maintaining a dirty bitmask would
work too, but it does push the memory consumption up further which might
be a concern.

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