From: Zidan Wang <zidan.wang@freescale.com>
To: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Cc: alsa-devel@alsa-project.org, patches@opensource.wolfsonmicro.com,
tiwai@suse.com, lgirdwood@gmail.com, broonie@kernel.org
Subject: Re: [PATCH v4] ASoC: wm8960: update pll and clock setting function
Date: Tue, 11 Aug 2015 18:12:37 +0800 [thread overview]
Message-ID: <20150811101235.GA18737@shlinux2> (raw)
In-Reply-To: <20150811080334.GJ25225@opensource.wolfsonmicro.com>
On Tue, Aug 11, 2015 at 09:03:35AM +0100, Charles Keepax wrote:
> On Tue, Aug 11, 2015 at 01:11:35PM +0800, Zidan Wang wrote:
> > Add sysclk auto mode. When it's sysclk auto mode, if the MCLK is
> > available for clock configure, using MCLK to provide sysclk directly,
> > otherwise, search a available pll out frequcncy and set pll.
> >
> > Configure clock in hw_params may cause problems when using bypass style
> > paths without hw_params in machine driver getting called. So add configure
> > clock to set_bias_level.
> >
> > Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
> > ---
>
> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
>
> Thanks,
> Charles
Hi Charles,
After rebase to the newest linux-nest/master, there will be a build error. I have fixed it and will
send patch v5, sorry for that.
Best Regards,
Zidan Wang
prev parent reply other threads:[~2015-08-11 11:23 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-11 5:11 [PATCH v4] ASoC: wm8960: update pll and clock setting function Zidan Wang
2015-08-11 8:03 ` Charles Keepax
2015-08-11 10:12 ` Zidan Wang [this message]
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