From: Vinod Koul <vinod.koul@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, tiwai@suse.de,
liam.r.girdwood@linux.intel.com, patches.audio@intel.com,
Jeeja KP <jeeja.kp@intel.com>,
"Subhransu S. Prusty" <subhransu.s.prusty@intel.com>
Subject: Re: [PATCH 5/9] ASoC: Intel: Skylake: Add topology core init and handlers
Date: Sat, 15 Aug 2015 22:51:32 +0530 [thread overview]
Message-ID: <20150815172132.GK13546@localhost> (raw)
In-Reply-To: <20150815170058.GK10748@sirena.org.uk>
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On Sat, Aug 15, 2015 at 10:00:58AM -0700, Mark Brown wrote:
> On Sat, Aug 15, 2015 at 07:46:58PM +0530, Vinod Koul wrote:
> > On Fri, Aug 14, 2015 at 11:03:13PM +0100, Mark Brown wrote:
>
> > > > + /* Index is for each config load */
> > > > + ret = snd_soc_tplg_component_load(&platform->component, &skl_tplg_ops, fw, 0);
>
> > > Which index?
>
> > The last arg of snd_soc_tplg_component_load() is id which is set as
> > tplg.req_index = id;
>
> > So the comment tries to explain how last 0 index is added. We have only one
> > load so we will be always 0 index
>
> Your comment isn't explaining that at all, sorry - it's making things
> less clear. It's peering into the implementation to translate ID to
> index and even with s/id/index/ it's begging the question "ID/index is
> what for each component load?". If you're adding a comment here I'd
> expect to see something like "Use the same ID each time because..."
> which explains something that isn't in the code.
Fair point, will add this detail now
--
~Vinod
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next prev parent reply other threads:[~2015-08-15 17:19 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-07 19:36 [PATCH 0/9] Add DSP topology management for SKL Subhransu S. Prusty
2015-08-07 19:36 ` [PATCH 1/9] ASoC: Intel: Skylake: Add pipe and modules handlers Subhransu S. Prusty
2015-08-14 21:30 ` Mark Brown
2015-08-15 12:55 ` Vinod Koul
2015-08-15 17:03 ` Mark Brown
2015-08-15 17:19 ` Vinod Koul
2015-08-07 19:36 ` [PATCH 2/9] ASoC: Intel: Skylake: Add module configuration helpers Subhransu S. Prusty
2015-08-07 19:36 ` [PATCH 3/9] ASoC: Intel: Skylake: add DSP platform widget event handlers Subhransu S. Prusty
2015-08-14 21:43 ` Mark Brown
2015-08-15 13:42 ` Vinod Koul
2015-08-15 14:36 ` Mark Brown
2015-08-15 15:12 ` Vinod Koul
2015-08-15 16:46 ` Mark Brown
2015-08-07 19:36 ` [PATCH 4/9] ASoC: Intel: Skylake: Add FE and BE hw_params handling Subhransu S. Prusty
2015-08-14 21:53 ` Mark Brown
2015-08-15 14:00 ` Vinod Koul
2015-08-15 14:46 ` Mark Brown
2015-08-15 15:13 ` Vinod Koul
2015-08-07 19:36 ` [PATCH 5/9] ASoC: Intel: Skylake: Add topology core init and handlers Subhransu S. Prusty
2015-08-14 22:03 ` Mark Brown
2015-08-15 14:16 ` Vinod Koul
2015-08-15 17:00 ` Mark Brown
2015-08-15 17:21 ` Vinod Koul [this message]
2015-08-07 19:36 ` [PATCH 6/9] ASoC: Intel: Skylake: Initialize and load DSP controls Subhransu S. Prusty
2015-08-07 19:36 ` [PATCH 7/9] ASoC: Intel: Skylake: Add DSP support and enable it Subhransu S. Prusty
2015-08-07 19:36 ` [PATCH 8/9] ASoC: Intel: Skylake: Initialize NHLT table Subhransu S. Prusty
2015-08-07 19:36 ` [PATCH 9/9] ASoC: Intel: Skylake: Remove CPU dai that is not used Subhransu S. Prusty
2015-08-14 22:06 ` Mark Brown
2015-08-15 14:19 ` Vinod Koul
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