From: Shawn Guo <shawnguo@kernel.org>
To: Nicolin Chen <nicoleotsuka@gmail.com>
Cc: fabio.estevam@freescale.com, alsa-devel@alsa-project.org,
Zidan Wang <zidan.wang@freescale.com>,
tiwai@suse.com, timur@tabi.org, broonie@kernel.org
Subject: Re: [PATCH] ASoC: fsl-asoc-card: add wm8960 support
Date: Sun, 6 Sep 2015 19:33:44 +0800 [thread overview]
Message-ID: <20150906113344.GN30746@tiger> (raw)
In-Reply-To: <20150814092252.GA4164@Asurada-CZ80>
On Fri, Aug 14, 2015 at 02:22:53AM -0700, Nicolin Chen wrote:
> I have to add Shawn for help :)
>
> On Fri, Aug 14, 2015 at 03:38:16PM +0800, Zidan Wang wrote:
>
> > ccm ----->1------------------>2<------------>3
> > | |
> > | |
> > 4 SAIx MCLK1 5 SAIx MCLK2
> >
> > If this bit is set, the clock route is ccm->1->2->3, 2 to 5 is disconnect.
> > If this bit is clear, the clock route is 3->2->5, 1 to 2 is disconnect.
>
> @Shawn
>
> Suppose 1 and 2 are clock MUXs that we can't specifically touch
> via registers. And 3 is an IO PAD that can either output a clock
> from CCM or input a clock from an external source outside SoC.
> Both 4 and 5 are two clock sources for one single SAI, SAI2 for
> example.
>
> There is a bit in the GPR register to control above routes. And
> my question is where should be the best place to put this bit.
If this route selection is a decision of board design, it should fit
device tree quite well. As the platform maintainer, I surely hope we
can handle this in audio driver. But if there is really no place better
than platform code to handle it, I can accept it.
Shawn
>
> Apparently it's outside the CCM and SAI, not to mention it is
> hard to relate this bit to this ASoC dai-link driver which's
> supposed to solve problems between the SAI and CODECs.
>
> Thanks
> Nicolin
next prev parent reply other threads:[~2015-09-06 11:34 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-12 3:22 [PATCH] ASoC: fsl-asoc-card: add wm8960 support Zidan Wang
2015-08-12 3:42 ` Nicolin Chen
2015-08-12 4:45 ` Zidan Wang
2015-08-12 6:40 ` Nicolin Chen
2015-08-12 7:39 ` Zidan Wang
2015-08-12 9:03 ` Nicolin Chen
2015-08-12 22:27 ` Nicolin Chen
2015-08-14 2:21 ` Zidan Wang
2015-08-14 3:58 ` Nicolin Chen
2015-08-14 7:38 ` Zidan Wang
2015-08-14 9:22 ` Nicolin Chen
2015-09-06 11:33 ` Shawn Guo [this message]
2015-09-17 8:03 ` Nicolin Chen
2015-09-18 13:19 ` Shawn Guo
2015-09-19 17:50 ` Nicolin Chen
2015-08-12 12:05 ` Fabio Estevam
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