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From: Vinod Koul <vinod.koul@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: patches.audio@intel.com, liam.r.girdwood@linux.intel.com,
	alsa-devel@alsa-project.org,
	"Subhransu S. Prusty" <subhransu.s.prusty@intel.com>,
	Jeeja KP <jeeja.kp@intel.com>
Subject: Re: [PATCH v2 1/9] ASoC: Intel: Skylake: Add pipe and modules handlers
Date: Mon, 21 Sep 2015 09:07:13 +0530	[thread overview]
Message-ID: <20150921033713.GF2381@localhost> (raw)
In-Reply-To: <20150919160023.GC30445@sirena.org.uk>


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On Sat, Sep 19, 2015 at 09:00:23AM -0700, Mark Brown wrote:
> On Mon, Aug 17, 2015 at 10:56:36PM +0530, Vinod Koul wrote:
> 
> > +static int skl_tplg_bind_unbind_pipes(struct skl_module_cfg *src_module,
> > +	struct skl_module_cfg *sink_module, struct skl_sst *ctx, bool bind)
> > +{
> > +	int ret;
> > +
> > +	if (!bind) {
> > +		ret = skl_stop_pipe(ctx, src_module->pipe);
> > +		if (ret < 0)
> > +			return ret;
> > +
> > +		ret = skl_unbind_modules(ctx, src_module, sink_module);
> > +	} else {
> > +		ret = skl_bind_modules(ctx, src_module, sink_module);
> > +	}
> > +
> > +	return ret;
> > +}
> 
> Can we *please* stop having these functions which optionally do several
> different things with nothing at all shared between the different paths?
> It just adds a layer of indentation in the function and makes everything
> harder to read (including at the call site - how does the reader know if
> a given call will bind or unbind?).

Well while reading based on the argument bind we would know if we are doing
bind or unbind. While binding we call only bind. On unbind we have to stop
and then unbind.

I will remove this and few other wrappers like this which will help in
readability and reviews

> 
> I'm sure I've raised this before.
Sorry to miss that, will fix this time for sure


> > +static bool skl_tplg_is_pipe_mem_available(struct skl *skl,
> > +                               struct skl_module_cfg *mconfig)
> 
> I'm not seeing any users of this function (unlike the mcps checker).

It is called in skl_tplg_mixer_dapm_pre_pmu_event() which is in Patch 3 of
this series.

> > +	if (skl->resource.mem + mconfig->pipe->memory_pages > skl->resource.max_mem) {
> > +		dev_err(ctx->dev, "exceeds ppl memory available=%d > mem=%d\n",
> > +				skl->resource.max_mem, skl->resource.mem);
> > +		return false;
> > +	}
> 
> I'm not sure how the user is going to be able to tell what exceeded the
> maximum memory here.  

Module Id and Instance Id are printed before this but yes that is debug, so
merging the two to error alone makes sense, will do that here


> > +static bool skl_tplg_is_pipe_mcps_available(struct skl *skl,
> > +				struct skl_module_cfg *mconfig)
> 
> This looks an awful lot like the memory check.  Can we make a struct or
> ideally array for the constraints and then have a single function which
> checks them all?

No it only two checks, one for MCPS and one for memory. We cannot have
single function as they are checked at two places. Due to FW construction.
MCPS is property of each module whereas memory is for complete pipe.
For each module while initialization we check MCPS whereas for pipe creation
we check memory


> > +	list_for_each_entry(p, &w->sinks, list_source) {
> > +		if ((p->sink->priv == NULL)
> > +			&& (!is_skl_dsp_widget_type(w)))
> > +			continue;
> > +
> > +		if ((p->sink->priv != NULL) && (p->connect)
> > +			&& (is_skl_dsp_widget_type(p->sink))) {
> 
> This is harder to read with the extra brackets.
Will fix this

-- 
~Vinod

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  reply	other threads:[~2015-09-21  3:34 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-17 17:26 [PATCH v2 0/9] Add DSP topology management for SKL Vinod Koul
2015-08-17 17:26 ` [PATCH v2 1/9] ASoC: Intel: Skylake: Add pipe and modules handlers Vinod Koul
2015-09-19 16:00   ` Mark Brown
2015-09-21  3:37     ` Vinod Koul [this message]
2015-09-21 16:36       ` Mark Brown
2015-08-17 17:26 ` [PATCH v2 2/9] ASoC: Intel: Skylake: Add module configuration helpers Vinod Koul
2015-08-17 17:26 ` [PATCH v2 3/9] ASoC: Intel: Skylake: add DSP platform widget event handlers Vinod Koul
2015-09-17  9:47   ` Liam Girdwood
2015-09-17 11:38     ` Vinod Koul
2015-09-17 12:25       ` Liam Girdwood
2015-09-18  4:22         ` Vinod Koul
2015-09-19 16:11   ` Mark Brown
2015-09-21  3:24     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 4/9] ASoC: Intel: Skylake: Add FE and BE hw_params handling Vinod Koul
2015-09-19 16:22   ` Mark Brown
2015-09-21  3:13     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 5/9] ASoC: Intel: Skylake: Add topology core init and handlers Vinod Koul
2015-09-18  9:55   ` Liam Girdwood
2015-09-18 15:09     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 6/9] ASoC: Intel: Skylake: Initialize and load DSP controls Vinod Koul
2015-09-18  9:58   ` Liam Girdwood
2015-09-18 15:11     ` Vinod Koul
2015-09-19 16:26     ` Mark Brown
2015-09-21  3:26       ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 7/9] ASoC: Intel: Skylake: Add DSP support and enable it Vinod Koul
2015-08-17 17:26 ` [PATCH v2 8/9] ASoC: Intel: Skylake: Initialize NHLT table Vinod Koul
2015-09-19 16:27   ` Mark Brown
2015-09-21  3:38     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 9/9] ASoC: Intel: Skylake: Remove unused CPU dai's Vinod Koul
2015-09-03  8:14 ` [PATCH v2 0/9] Add DSP topology management for SKL Vinod Koul
2015-09-11 11:45   ` Mark Brown
2015-09-19 16:56     ` Mark Brown
2015-09-21  3:57       ` Vinod Koul
2015-09-21 16:33         ` Mark Brown
2015-09-21 16:47           ` Vinod Koul

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