From: Vinod Koul <vinod.koul@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: liam.r.girdwood@linux.intel.com, patches.audio@intel.com,
alsa-devel@alsa-project.org
Subject: Re: [PATCH v2 0/9] Add DSP topology management for SKL
Date: Mon, 21 Sep 2015 09:27:39 +0530 [thread overview]
Message-ID: <20150921035739.GH2381@localhost> (raw)
In-Reply-To: <20150919165612.GA32072@sirena.org.uk>
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On Sat, Sep 19, 2015 at 09:56:12AM -0700, Mark Brown wrote:
> On Fri, Sep 11, 2015 at 12:45:00PM +0100, Mark Brown wrote:
> > On Thu, Sep 03, 2015 at 01:44:54PM +0530, Vinod Koul wrote:
>
> > > I was wondering if you have any feedback on this series ?
>
> > Please don't send content free pings (as I'm sure I've mentioned
> > before). I've not looked at this yet because it's another large,
> > invasive patch series which you sent at the very end of the development
> > cycle.
>
> So, I've now looked at these, though not fully. To expand on the above
> a bit: these are big bits of very device specific code that's really
> hard to read and understand and when I do read it I'm seeing similar
> issues again and again both in terms of big picture stuff and the
> trivial details (including the inconsistencies in things like commenting
> style that I'm not specifically pulling up). I'm really worried that
> I'm often seeing fragments of things that may or may not work well
> together.
>
> These Intel devices not only have a lot more code than most devices do,
> they also get a lot more exposure than most devices do to end users so I
> actually have to try to make some effort to understand what's going on
> and can't skimp on review even though I feel like I am. I'm really
> concerned about where we're heading here and how robustly the results
> are going to work.
>
> This all really slows down review, both directly in requiring detailed
> checks of hard to follow the code and as a result of making almost all
> other code review seem much more productive.
>
> As well as the low level code quality issues it would really help if
> rather than continually sending large blocks of functionality we were
> starting from something that was a minimally viable but functional
> system and then extending that. That should be a lot easier to follow.
Thanks Mark for the review,
I wouldn't have pinged but had been more than few weeks so was wondering if
this got missed. I did realise you were travelling and merge window came
up, but still thought Mark's typical turnaound is 1-2 weeks so was expecting
something. I do understand this take time but no harm in checking if it is
beyond usual window one expects.
Now on the code due to inherent nature of HW (we have HDA + DSP + I2S!!!)
and SW scalability, we do need lots of code for basic audio.
Btw _this_ patch series is the last one to get basic minimal audio out of SKL.
After this we will add machine and then features...
We did decide to use DPCM, DAPM and topology here to solve manging the DSP
using these frameworks. yes hard coding a simple mixer and two pipes could
have made code look easy to follow but then we would be redoing those bits
as we scale these to defferent designs.
And to provide what we are trying here I have attached the SKL Topology conf
file to give a picture of topology we are trying to build as a reference.
On code issues, I will fix the style and wrappers issues you raised and
other instances where this might be required.
Also where you feel something is missing please do ask. Sometimes things are
perceived intuitive for us as we are doing this for quire some time but
may not be so for fresh eyes :)
Thanks
--
~Vinod
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next prev parent reply other threads:[~2015-09-21 3:55 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-17 17:26 [PATCH v2 0/9] Add DSP topology management for SKL Vinod Koul
2015-08-17 17:26 ` [PATCH v2 1/9] ASoC: Intel: Skylake: Add pipe and modules handlers Vinod Koul
2015-09-19 16:00 ` Mark Brown
2015-09-21 3:37 ` Vinod Koul
2015-09-21 16:36 ` Mark Brown
2015-08-17 17:26 ` [PATCH v2 2/9] ASoC: Intel: Skylake: Add module configuration helpers Vinod Koul
2015-08-17 17:26 ` [PATCH v2 3/9] ASoC: Intel: Skylake: add DSP platform widget event handlers Vinod Koul
2015-09-17 9:47 ` Liam Girdwood
2015-09-17 11:38 ` Vinod Koul
2015-09-17 12:25 ` Liam Girdwood
2015-09-18 4:22 ` Vinod Koul
2015-09-19 16:11 ` Mark Brown
2015-09-21 3:24 ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 4/9] ASoC: Intel: Skylake: Add FE and BE hw_params handling Vinod Koul
2015-09-19 16:22 ` Mark Brown
2015-09-21 3:13 ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 5/9] ASoC: Intel: Skylake: Add topology core init and handlers Vinod Koul
2015-09-18 9:55 ` Liam Girdwood
2015-09-18 15:09 ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 6/9] ASoC: Intel: Skylake: Initialize and load DSP controls Vinod Koul
2015-09-18 9:58 ` Liam Girdwood
2015-09-18 15:11 ` Vinod Koul
2015-09-19 16:26 ` Mark Brown
2015-09-21 3:26 ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 7/9] ASoC: Intel: Skylake: Add DSP support and enable it Vinod Koul
2015-08-17 17:26 ` [PATCH v2 8/9] ASoC: Intel: Skylake: Initialize NHLT table Vinod Koul
2015-09-19 16:27 ` Mark Brown
2015-09-21 3:38 ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 9/9] ASoC: Intel: Skylake: Remove unused CPU dai's Vinod Koul
2015-09-03 8:14 ` [PATCH v2 0/9] Add DSP topology management for SKL Vinod Koul
2015-09-11 11:45 ` Mark Brown
2015-09-19 16:56 ` Mark Brown
2015-09-21 3:57 ` Vinod Koul [this message]
2015-09-21 16:33 ` Mark Brown
2015-09-21 16:47 ` Vinod Koul
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