From: Mark Brown <broonie@kernel.org>
To: yitian <yitian.bu@tangramtek.com>
Cc: lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com,
Andrew.Jackson@arm.com, wsa@the-dreams.de,
alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method
Date: Wed, 30 Sep 2015 19:17:51 +0100 [thread overview]
Message-ID: <20150930181751.GT15635@sirena.org.uk> (raw)
In-Reply-To: <006301d0fac4$94eb5890$bec209b0$@tangramtek.com>
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On Tue, Sep 29, 2015 at 10:39:00PM +0800, yitian wrote:
> from Designware I2S datasheet, irq is cleared by reading from
> TOR/ROR registers, rather than by writing into them.
This doesn't apply against current code, please check and resend.
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next prev parent reply other threads:[~2015-09-30 18:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-29 14:39 [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method yitian
2015-09-30 18:17 ` Mark Brown [this message]
2015-10-01 2:39 ` yitian
2015-10-01 10:03 ` Mark Brown
2015-10-02 7:22 ` yitian
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